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A1335LLETR-DD-T

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Allegro MicroSystems, LLC Angle, Linear Position Sensors, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsensorsa1335lletr-dd-tfactory-2.0.0extractor-text

Verified A1335LLETR-DD-T

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier lcsc, 24 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: A1335LLETR-DD-T · TSSOP-24 · 24 pins
  • ✓copper: 24 copper pads, none touching another net
  • ✓datasheet: all 24 pin names found in the 29-page datasheet
  • ✓distributor: lcsc C2655203, digikey 620-1767-2-ND, mouser 250-A1335LLETR-DD-T
  • ✓family: TSSOP-24_4.4x7.8mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-t69e9nld/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.28)
  • ✓pads: 24 pins = 24 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 24 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ a1335lletr-dd-t.kicad_sym✓ a1335lletr-dd-t.kicad_mod✓ a1335lletr-dd-t.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 3d ago
viewers a1335lletr-dd-t: viewers · Ray 3d ago
a1335lletr-dd-t-etched.glb Publish 0.1.0 · Ray 3d ago
a1335lletr-dd-t-etched.step a1335lletr-dd-t: factory component page (tier=lcsc) · Ray 3d ago
a1335lletr-dd-t-hero.glb a1335lletr-dd-t: hero GLB from the etched model (keeps the MPN mark) · Ray 3d ago
a1335lletr-dd-t-hero.overlay.json Publish 0.1.0 · Ray 3d ago
a1335lletr-dd-t.glb Publish 0.1.0 · Ray 3d ago
a1335lletr-dd-t.kicad_mod Publish 0.1.0 · Ray 3d ago
a1335lletr-dd-t.kicad_sym Publish 0.1.0 · Ray 3d ago
a1335lletr-dd-t.lbr Publish 0.1.0 · Ray 3d ago
a1335lletr-dd-t.step Publish 0.1.0 · Ray 3d ago
package.json Publish 0.1.0 · Ray 3d ago
page.json Set visibility: public · Ray 3d ago
README.md Publish 0.1.0 · Ray 3d ago
verification.json Verified: Published by the parts factory: tier lcsc, 24 pins · Ray 3d ago

A1335LLETR-DD-T

Allegro MicroSystems, LLC · Angle, Linear Position Sensors · TSSOP-24

A1335LLETR-DD-T from Allegro MicroSystems, LLC, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DGND_1 power_in Device digital ground terminal for die 1.
2 BYP_1 passive Internal bypass node for die 1, to be connected with a bypass capacitor to DGND.
3 AGND_1 power_in Device analog ground terminal for die 1.
4 NC unconnected Not connected; connect to GND for optimal ESD performance.
5 VCC_1 power_in Device power supply and input for EEPROM writing pulses for die 1; used to enter/exit Manchester Serial Communication mode and serves as programming data input once the mode has been entered.
6 ISEL_2 input Selects between I2C operation (set to logic low) or SPI operation (set to logic high) for die 2; set low for SENT/Manchester operation.
7 SENT_2 output SENT transmission output terminal for die 2, also the Manchester output in Manchester mode; open drain, pull-up to external supply.
8 SDA_2/MISO_2 bidirectional I2C digital data terminal for die 2 (digital output of evaluated target angle and programming data input), open drain with external pull-up to 3.3 V; SPI Master Input/Slave Output terminal for die 2.
9 SCL_2/SCLK_2 input Digital serial clock input for die 2 (I2C: SCL, SPI: SCLK); open drain, pull up externally to 3.3 V.
10 SA1_2/MOSI_2 input I2C: SA1 digital input setting slave address bit 1, tied to BYP for 1 or DGND for 0; SPI: Master Output/Slave Input terminal for die 2.
11 SA0_2/CS_2 input I2C: SA0 digital input setting slave address bit 0, tied to BYP for 1 or DGND for 0; SPI: active-low Chip Select input for die 2.
12 DGND_2 power_in Device digital ground terminal for die 2.
13 DGND_2 power_in Device digital ground terminal for die 2.
14 BYP_2 passive Internal bypass node for die 2, to be connected with a bypass capacitor to DGND.
15 AGND_2 power_in Device analog ground terminal for die 2.
16 NC unconnected Not connected; connect to GND for optimal ESD performance.
17 VCC_2 power_in Device power supply and input for EEPROM writing pulses for die 2; used to enter/exit Manchester Serial Communication mode and serves as programming data input once the mode has been entered.
18 ISEL_1 input Selects between I2C operation (set to logic low) or SPI operation (set to logic high) for die 1; set low for SENT/Manchester operation.
19 SENT_1 output SENT transmission output terminal for die 1, also the Manchester output in Manchester mode; open drain, pull-up to external supply.
20 SDA_1/MISO_1 bidirectional I2C digital data terminal for die 1 (digital output of evaluated target angle and programming data input), open drain with external pull-up to 3.3 V; SPI Master Input/Slave Output terminal for die 1.
21 SCL_1/SCLK_1 input Digital serial clock input for die 1 (I2C: SCL, SPI: SCLK); open drain, pull up externally to 3.3 V.
22 SA1_1/MOSI_1 input I2C: SA1 digital input setting slave address bit 1, tied to BYP for 1 or DGND for 0; SPI: Master Output/Slave Input terminal for die 1.
23 SA0_1/CS_1 input I2C: SA0 digital input setting slave address bit 0, tied to BYP for 1 or DGND for 0; SPI: active-low Chip Select input for die 1.
24 DGND_1 power_in Device digital ground terminal for die 1.

Key specifications

Parameter Value
Manufacturer Allegro MicroSystems, LLC
Package TSSOP-24
Category Sensors
Pins 24

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Forward Supply Voltage VCC 24 V 2
Reverse Supply Voltage VRCC -18 V 2
All Other Pins VIN -0.5 5.5 V 2
Operating Ambient Temperature (L temperature range) TA -40 150 ºC 2
Maximum Junction Temperature TJ(max) 165 ºC 2
Storage Temperature Tstg -65 170 ºC 2
Package Thermal Resistance RθJA 117 ºC/W LE-24 package (dual die, this MPN) 2
Supply Voltage VCC 4.5 5 5.5 V 4
Supply Current ICC 15 20 mA 4
VCC Low Flag Threshold VCCLOW(TH) 4.4 4.55 4.75 V 4
Supply Zener Clamp Voltage VZSUP 26.5 V IZCC = ICC + 3 mA, TA = 25°C 4
Reverse Battery Voltage VRCC -18 V IRCC = -3 mA, TA = 25°C 4
Power-On Time tPO 2 40 ms TA = 25°C 4
Digital Input High Voltage (SPI) VIH 2.8 3.63 V MOSI, SCLK, CS pins 4
Digital Input Low Voltage (SPI) VIL 0.5 V MOSI, SCLK, CS pins 4
SPI Output High Voltage VOH 2.93 3.3 3.69 V MISO pins, TA = 25°C 4
SPI Clock Frequency fSCLK 0.1 10 MHz MISO pins, CL = 50 pF 4
Chip Select to First SCLK Edge tCS 50 ns Time from CS going low to SCLK falling edge 4
Chip Select Idle Time tCS_IDLE 200 ns Time CS must be high between SPI message frames 4
MOSI Setup Time tSU 10 ns Input setup time before SCLK rising edge 4
MOSI Hold Time tHD 50 ns Input hold time after SCLK rising edge 4
SCLK to CS Hold Time tCHD 5 ns Hold SCLK high time before CS rising edge 4
Load Capacitance CL 50 pF Loading on digital output (MISO) pin 4
Bus Free Time Between Stop and Start tBUF 1.3 µs 4
Hold Time Start Condition tHD(STA) 0.6 µs 4
Setup Time for Repeated Start Condition tSU(STA) 0.6 µs 4
SCL Low Time tLOW 1.3 µs 4
SCL High Time tHIGH 0.6 µs 4
Data Setup Time tSU(DAT) 100 ns 4
Data Hold Time tHD(DAT) 0 900 ns 4
Setup Time for Stop Condition tSU(STO) 0.6 µs 4
Logic Input Low Level (SDA and SCL pins) VIL(I2C) 0.9 V 4
Logic Input High Level (SDA and SCL pins) VIH(I2C) 2.1 3.63 V 4
Logic Input Current IIN -1 1 µA VIN = 0 V to VCC 5
Output Voltage (SDA pin) VOL(I2C) 0.6 V RPU = 1 kΩ, CB = 100 pF, TA = 25°C 5
Logic Input Rise Time (SDA and SCL pins) tr(IN) 300 ns 5
Logic Input Fall Time (SDA and SCL pins) tf(IN) 300 ns 5
SDA Output Rise Time tr(OUT) 300 ns RPU = 1 kΩ, CB = 100 pF 5
SDA Output Fall Time tF(OUT) 300 ns RPU = 1 kΩ, CB = 100 pF 5
SCL Clock Frequency fCLK 400 kHz 5
Total Capacitive Load on SDA Line CB 100 pF 5
Pull-Up Voltage VPU 2.97 3.3 3.63 V RPU = 1 kΩ, CB = 100 pF 5
SENT Message Duration tSENT 1 ms Tick time = 3 µs 5
SENT Output Signal Low VSENT(L) 0.1 V 5 kΩ ≤ Rpullup ≤ 50 kΩ 5
SENT Trigger Signal Low VSENTtrig(L) 1.4 V 5
SENT Trigger Signal High VSENTtrig(H) 2.8 V 5
Minimum Time Frame for SENT Trigger Signal Ttrig(MIN) 2 µs 5
Magnetic Field Range B 1500 G Range of input field 5
Angle Error ERRANG -1.3 1.3 degrees TA = 150°C, ideal magnet alignment, B = 300 G, target rpm = 0, no linearization 6
Temperature Drift ANGLEDRIFT -1.4 1.4 degrees TA = 150°C, B = 300 G 6
Bit Rate 4 100 kbps Defined by the input message bit rate sent from the external controller 13
Data Bit Pulse Width at 4 kbps tBIT 243 250 257 µs 13
Data Bit Pulse Width at 100 kbps tBIT 9.5 10 10.5 µs 13
Bit Time Error errTBIT -11 11 % Deviation in tBIT during one command frame 13
Manchester Code High Voltage (input) VMAN(H) 7.8 V Applied to VCC line 13
Manchester Code Low Voltage (input) VMAN(L) 5.7 V Applied to VCC line 13
Manchester Code Low Voltage (output on SENT line) VMAN(L) 0.1 V 5 kΩ ≤ Rpullup ≤ 50 kΩ 13
EEPROM Programming Pulse Setup Time tsPULSE(E) 40 µs Delay from last bit cell of write command to start of EEPROM programming pulse 13

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin dual die in a 24-pin TSSOP. Both packages are lead (Pb) free with 100% matte-tin leadframe plating. 1

CAD (KiCad official)

  • Symbol: A1335LLETR-DD-T
  • Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
  • 3D model: TSSOP-24 (KiCad packages3D, STEP)
  • 3D model files: a1335lletr-dd-t-etched.step / a1335lletr-dd-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); a1335lletr-dd-t.step / a1335lletr-dd-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Allegro MicroSystems, LLC datasheet (29 pp, sha256 cae1cf85402d79ad, retrieved 2026-10-30, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF