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9435
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Shenzhen JingYang MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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9435
Shenzhen JingYang · MOSFETs · SOP-8
9435 from Shenzhen JingYang, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET, one of three source pins (S) shown on the SOP8 drawing; drain-source voltage rating is -30V. |
| 2 | S | passive | Source of the P-channel MOSFET, one of three source pins (S) shown on the SOP8 drawing; drain-source voltage rating is -30V. |
| 3 | S | passive | Source of the P-channel MOSFET, one of three source pins (S) shown on the SOP8 drawing; drain-source voltage rating is -30V. |
| 4 | G | input | Gate of the P-channel MOSFET with a gate-source voltage rating of ±20V and a gate threshold of -1.5V typical (-3.0V max). |
| 5 | D | passive | Drain of the P-channel MOSFET, one of four drain pins (D) shown on the SOP8 drawing; continuous drain current is -5.3A. |
| 6 | D | passive | Drain of the P-channel MOSFET, one of four drain pins (D) shown on the SOP8 drawing; continuous drain current is -5.3A. |
| 7 | D | passive | Drain of the P-channel MOSFET, one of four drain pins (D) shown on the SOP8 drawing; continuous drain current is -5.3A. |
| 8 | D | passive | Drain of the P-channel MOSFET, one of four drain pins (D) shown on the SOP8 drawing; continuous drain current is -5.3A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen JingYang |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | -30 | V | VGS=0V, IDS=250μA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | -1 | μA | VDS=-24V, VGS=0V | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | -30 | 30 | μA | VDS=-24V, VGS=0V, TA=85°C | 2 | |
| Gate Threshold Voltage | VGS(th) | -1 | -1.5 | -3 | V | VDS=VGS, IDS=250μA | 2 |
| Gate Leakage Current | IGSS | -100 | 100 | nA | VGS=±20V, VDS=0V | 2 | |
| Drain-Source On-state Resistance | RDS(ON) | 55 | 60 | mΩ | VGS=-10V, IDS=-5.3A | 2 | |
| Drain-Source On-state Resistance | RDS(ON) | 80 | 95 | mΩ | VGS=-4.5V, IDS=-4.2A | 2 | |
| Diode Forward Voltage | VSD | -0.7 | -1.3 | V | ISD=-1.7A, VGS=0V | 2 | |
| Drain-Source Voltage | VDSS | -30 | V | 2 | |||
| Gate-Source Voltage | VGSS | -20 | 20 | V | 2 | ||
| Continue Drain Current | ID | -5.3 | A | 2 | |||
| Pulsed Drain Current | IDM | -30 | A | 2 | |||
| Diode Continuous Forward Current | IS | -2 | A | Note a: current may be limited by bonding wire | 2 | ||
| Maximum Junction Temperature | TJ | 150 | °C | 2 | |||
| Storage Temperature Range | TSTG | -55 | 150 | °C | 2 | ||
| Thermal Resistance-Junction to Ambient | RθJA | 62.5 | °C/W | Note c: SOP-8 surface mounted on 1 in² pad area, t≤10 sec; note 1: test pulse width 8.3ms | 2 |
CAD (KiCad official)
- Symbol:
9435 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
9435-etched.step/9435-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);9435.step/9435.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shenzhen JingYang datasheet (5 pp, sha256
e27fcaa9bc2fdce0, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 9435
**Shenzhen JingYang** · MOSFETs · SOP-8
9435 from Shenzhen JingYang, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET, one of three source pins (S) shown on the SOP8 drawing; drain-source voltage rating is -30V. |
| 2 | S | passive | Source of the P-channel MOSFET, one of three source pins (S) shown on the SOP8 drawing; drain-source voltage rating is -30V. |
| 3 | S | passive | Source of the P-channel MOSFET, one of three source pins (S) shown on the SOP8 drawing; drain-source voltage rating is -30V. |
| 4 | G | input | Gate of the P-channel MOSFET with a gate-source voltage rating of ±20V and a gate threshold of -1.5V typical (-3.0V max). |
| 5 | D | passive | Drain of the P-channel MOSFET, one of four drain pins (D) shown on the SOP8 drawing; continuous drain current is -5.3A. |
| 6 | D | passive | Drain of the P-channel MOSFET, one of four drain pins (D) shown on the SOP8 drawing; continuous drain current is -5.3A. |
| 7 | D | passive | Drain of the P-channel MOSFET, one of four drain pins (D) shown on the SOP8 drawing; continuous drain current is -5.3A. |
| 8 | D | passive | Drain of the P-channel MOSFET, one of four drain pins (D) shown on the SOP8 drawing; continuous drain current is -5.3A. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen JingYang |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | -30 | | | V | VGS=0V, IDS=250μA | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | -1 | μA | VDS=-24V, VGS=0V | 2 |
| Zero Gate Voltage Drain Current | IDSS | -30 | | 30 | μA | VDS=-24V, VGS=0V, TA=85°C | 2 |
| Gate Threshold Voltage | VGS(th) | -1 | -1.5 | -3 | V | VDS=VGS, IDS=250μA | 2 |
| Gate Leakage Current | IGSS | -100 | | 100 | nA | VGS=±20V, VDS=0V | 2 |
| Drain-Source On-state Resistance | RDS(ON) | | 55 | 60 | mΩ | VGS=-10V, IDS=-5.3A | 2 |
| Drain-Source On-state Resistance | RDS(ON) | | 80 | 95 | mΩ | VGS=-4.5V, IDS=-4.2A | 2 |
| Diode Forward Voltage | VSD | | -0.7 | -1.3 | V | ISD=-1.7A, VGS=0V | 2 |
| Drain-Source Voltage | VDSS | | | -30 | V | | 2 |
| Gate-Source Voltage | VGSS | -20 | | 20 | V | | 2 |
| Continue Drain Current | ID | | | -5.3 | A | | 2 |
| Pulsed Drain Current | IDM | | | -30 | A | | 2 |
| Diode Continuous Forward Current | IS | | | -2 | A | Note a: current may be limited by bonding wire | 2 |
| Maximum Junction Temperature | TJ | | | 150 | °C | | 2 |
| Storage Temperature Range | TSTG | -55 | | 150 | °C | | 2 |
| Thermal Resistance-Junction to Ambient | RθJA | | | 62.5 | °C/W | Note c: SOP-8 surface mounted on 1 in² pad area, t≤10 sec; note 1: test pulse width 8.3ms | 2 |
## CAD (KiCad official)
- Symbol: `9435`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `9435-etched.step` / `9435-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `9435.step` / `9435.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Shenzhen JingYang datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603165576605024256) (5 pp, sha256 `e27fcaa9bc2fdce0`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/9435-datasheet.pdf)