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93LC56B

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Microchip Tech EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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93LC56B

Microchip Tech · EEPROM · SOIC-8

93LC56B from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input A high level selects the device and a low level deselects it into Standby mode, and CS must be low for 250 ns minimum (TCSL) between consecutive instructions.
2 CLK input Opcodes, address and data bits are clocked in on the positive edge of CLK, and CLK is a don't care while CS is low.
3 DI input Data In clocks in the Start bit, opcode, address and data synchronously with the CLK input.
4 DO output Data Out outputs read data synchronously with CLK (TPD after the positive edge) and provides Ready/Busy status during erase and write cycles when CS is brought high after TCSL.
5 VSS power_in Ground reference for the device.
6 NC unconnected No internal connection on the 93LC56B; this pin is ORG (memory organization select) only on the 93LC56C version.
7 NC unconnected No internal connection.
8 VCC power_in Power supply; the 93LC56B is specified for VCC from 2.5V to 5.5V in the Device Selection Table.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC VCC 7 V 3
All inputs and outputs w.r.t. VSS -0.6 V 3
Storage temperature -65 150 °C 3
Ambient temperature with power applied -40 125 °C 3
ESD protection on all pins 4 kV 3
High-level Input Voltage VIH1 2 V VCC 2.7V 3
Low-level Input Voltage VIL1 -0.3 0.8 V VCC 2.7V 3
Low-level Input Voltage VIL2 -0.3 V VCC < 2.7V 3
Low-level Output Voltage VOL1 0.4 V IOL = 2.1 mA, VCC = 4.5V 3
Low-level Output Voltage VOL2 0.2 V IOL = 100 µA, VCC = 2.5V 3
High-level Output Voltage VOH1 2.4 V IOH = -400 µA, VCC = 4.5V 3
Input Leakage Current ILI -1 1 µA VIN = VSS or VCC 3
Output Leakage Current ILO -1 1 µA VOUT = VSS or VCC 3
Pin Capacitance (all inputs/outputs) CIN, COUT 7 pF VIN/VOUT = 0V (Note 1), TA = +25°C, FCLK = 1 MHz 3
Write Current ICC write 2 mA FCLK = 3 MHz, Vcc = 5.5V 3
Read Current ICC read 1 mA FCLK = 3 MHz, VCC = 5.5V 3
Read Current ICC read 500 µA FCLK = 2 MHz, VCC = 3.0V 3
Standby Current (Industrial) ICCS 1 µA I, Temp, CLK = CS = 0V, ORG = DI = VSS or VCC (Note 2) (Note 3) 3
Standby Current (Extended) ICCS 5 µA E, Temp, CLK = CS = 0V, ORG = DI = VSS or VCC (Note 2) (Note 3) 4
Clock frequency FCLK 2 MHz 2.5V VCC < 5.5V 4
Clock high time TCKH 250 ns 2.5V VCC < 5.5V 4
Clock low time TCKL 200 ns 2.5V VCC < 5.5V 4
Chip Select setup time TCSS 50 ns 4.5V VCC < 5.5V 4
Chip Select setup time TCSS 100 ns 2.5V VCC < 4.5V 4
Chip Select hold time TCSH 0 ns 1.8V VCC < 5.5V 4
Chip Select low time TCSL 250 ns 1.8V VCC < 5.5V 4
Data input setup time TDIS 100 ns 2.5V VCC < 5.5V 4
Data input hold time TDIH 100 ns 2.5V VCC < 5.5V 4
Data output delay time TPD 200 ns 4.5V VCC < 5.5V, CL = 100 pF 4
Data output delay time TPD 250 ns 2.5V VCC < 4.5V, CL = 100 pF 4
Data output disable time TCZ 100 ns 4.5V VCC < 5.5V, (Note 1) 4
Data output disable time TCZ 200 ns 1.8V VCC < 4.5V, (Note 1) 4
Status valid time TSV 200 ns 4.5V VCC < 5.5V, CL = 100 pF 4
Status valid time TSV 300 ns 2.5V VCC < 4.5V, CL = 100 pF 4
Program cycle time TWC 6 ms Erase/Write mode (AA and LC versions) 5
ERAL cycle time TEC 6 ms ERAL mode, 4.5V VCC 5.5V 5
WRAL cycle time TWL 15 ms WRAL mode, 4.5V VCC 5.5V 5
Endurance 1 M cycles +25°C, VCC = 5.0V, (Note 2) 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin Part Number VCC Range ORG Pin Word Size Temperature Ranges Packages 93AA56A 1.8V-5.5V No 8-bit I MC, MS, P, SN, OT, MN, ST 1

CAD (KiCad official)

  • Symbol: 93LC56B
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 93lc56b-etched.step / 93lc56b-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 93lc56b.step / 93lc56b.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (42 pp, sha256 c5dbb77a34576a14, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF