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93LC56-I

Microchip Tech · EEPROM · SOIC-8

93LC56-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Chip Select: a high level selects the device and a low level deselects it and forces Standby mode, with CS required to be low for 250 ns minimum (TCSL) between consecutive instructions.
2 CLK input Serial Data Clock: opcode, address and data bits are clocked in on its positive edge, data is clocked out on the positive edge, and CLK is a don't-care while CS is low.
3 DI input Serial Data Input: clocks in the Start bit, opcode, address and data synchronously with CLK.
4 DO tri_state Serial Data Output: outputs read data synchronously with CLK (TPD after the positive CLK edge) and provides Ready/Busy status during erase and write cycles, otherwise held in High-Z.
5 VSS power_in Ground reference for the device.
6 ORG input Memory organization select: tied to VCC selects x16 organization and tied to VSS selects x8; for clock speeds above 1 MHz it must be tied to VCC or VSS and may only be floated at 1 MHz or less for x16.
7 NU unconnected Not Utilized; listed as NU in the pin function table and not used by the device.
8 VCC power_in Power supply, specified as +1.8V to 5.5V in the pin function table (the DC and AC characteristics are specified for VCC = +2.5V to +5.5V).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC (operating range) VCC 2.5 5.5 V Industrial (I): TA = -40°C to +85°C 2
Ambient temperature, industrial TA -40 85 °C Industrial (I) 2
All inputs and outputs w.r.t. VSS -0.6 V 2
Storage temperature -65 150 °C 2
Ambient temperature with power applied -40 125 °C 2
ESD protection on all pins 4 kV 2
High-level input voltage VIH1 VIH1 2 V VCC 2.7V 2
High-level input voltage VIH2 VIH2 0.7 VCC VCC 2.7V 2
Low-level input voltage VIL1 VIL1 -0.3 0.8 V VCC 2.7V 2
Low-level input voltage VIL2 VIL2 -0.3 0.2 VCC VCC 2.7V 2
Low-level output voltage VOL1 VOL1 0.4 V IOL = 2.1 mA, VCC = 4.5V 2
Low-level output voltage VOL2 VOL2 0.3 V IOL = 100 µA, VCC = 2.5V 2
High-level output voltage VOH1 VOH1 2.4 V IOL = 400 µA, VCC = 4.5V 2
High-level output voltage VOH2 VOH2 -0.2 VCC IOL = 100 µA, VCC = 2.5V 2
Input leakage current ILI ILI -10 10 µA VIN = 0.1V to VCC 2
Output leakage current ILO ILO -10 10 µA VOUT = 0.1V to VCC 2
Pin capacitance (all inputs/outputs) CIN, COUT 7 pF VIN/VOUT = 0V (Note 1 & 2), TA = 25°C, FCLK = 1 MHz 2
ICC write operating current ICC write 3 mA FCLK = 2 MHz, VCC = 5.5V (Note 2) 2
ICC read operating current ICC read 1 mA FCLK = 2 MHz, VCC = 5.5V 2
ICC read operating current ICC read 500 µA FCLK = 1 MHz, VCC = 3.0V 2
Standby current ICCS ICCS 100 µA CLK = CS = 0V; VCC = 5.5V 2
Standby current ICCS ICCS 30 µA CLK = CS = 0V; VCC = 3.0V 2
Clock frequency FCLK FCLK 2 MHz VCC 4.5V 3
Clock frequency FCLK FCLK 1 MHz VCC 4.5V 3
Clock high time TCKH TCKH 250 ns 3
Clock low time TCKL TCKL 250 ns 3
Chip select setup time TCSS TCSS 50 ns Relative to CLK 3
Chip select hold time TCSH TCSH 0 ns Relative to CLK 3
Chip select low time TCSL TCSL 250 ns 3
Data input setup time TDIS TDIS 100 ns Relative to CLK 3
Data input hold time TDIH TDIH 100 ns Relative to CLK 3
Data output delay time TPD TPD 400 ns CL = 100 pF 3
Data output disable time TCZ TCZ 100 ns CL = 100 pF (Note 2) 3
Status valid time TSV TSV 500 ns CL = 100 pF 3
Program cycle time TWC TWC 4 10 ms Erase/Write mode 3
ERAL cycle time TEC TEC 8 15 ms ERAL mode (VCC=5V ±10%) 3
WRAL cycle time TWL TWL 16 30 ms WRAL mode (VCC=5V ±10%) 3
Endurance 1 M cycles 25°C, VCC = 5.0V, Block mode (Note 3) 3
Standby current ICCS ICCS 3 µA CLK = CS = 0V; VCC = 2.5V 2
ICC read operating current ICC read 100 µA FCLK = 1 MHz, VCC = 2.5V 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin packages. The rotated pin-out 93LC46X/56X/66X are offered in the “SN” package only. 1

CAD (KiCad official)

  • Symbol: 93LC56-I
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 93lc56-i-etched.step / 93lc56-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 93lc56-i.step / 93lc56-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (20 pp, sha256 4505cc44abc8619f, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF