93LC46A-I

{
  "slug": "93lc46a-i",
  "version": "0.1.0",
  "type": "component",
  "description": "Microchip Tech EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "memory",
    "93lc46a-i",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "93lc46a-i.kicad_sym",
    "93lc46a-i.kicad_mod",
    "93lc46a-i.glb",
    "93lc46a-i.step",
    "93lc46a-i.lbr",
    "docs/hero.png",
    "docs/93lc46a-i-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "93lc46a-i-hero.glb",
    "93lc46a-i-hero.overlay.json",
    "93lc46a-i-etched.glb"
  ],
  "component": {
    "mpn": "93LC46A-I",
    "manufacturer": "Microchip Tech",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Memory",
    "subcategory": "EEPROM",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/ebf121773e88563a80cb6a0f1362cc87.pdf",
    "parts": {
      "symbol": "93lc46a-i.kicad_sym",
      "footprint": "93lc46a-i.kicad_mod",
      "model_3d": "93lc46a-i-hero.glb",
      "model_3d_plain": "93lc46a-i-etched.glb",
      "model_3d_step": "93lc46a-i-etched.step",
      "model_3d_step_plain": "93lc46a-i.step",
      "lbr": "93lc46a-i.lbr"
    },
    "distributor_links": {
      "lcsc": "C185647"
    },
    "distributor_check": {
      "checked_at": "2026-10-26T19:19:12Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "CS",
        "type": "input",
        "description": "Chip Select: a high level selects the device, a low level deselects it and forces Standby mode, and CS must be low for 250 ns minimum (TCSL) between consecutive instructions."
      },
      {
        "number": "2",
        "name": "CLK",
        "type": "input",
        "description": "Serial Clock that synchronizes communication with the master; opcodes, address and data bits are clocked in (and data clocked out) on the positive edge of CLK."
      },
      {
        "number": "3",
        "name": "DI",
        "type": "input",
        "description": "Serial Data In, used to clock in the Start bit, opcode, address and data synchronously with the CLK input."
      },
      {
        "number": "4",
        "name": "DO",
        "type": "tri_state",
        "description": "Serial Data Out, which outputs read data synchronously with CLK (TPD after the positive edge) and gives Ready/Busy status during erase/write cycles; High-Z when CS is held low during the cycle."
      },
      {
        "number": "5",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "6",
        "name": "NC",
        "type": "unconnected",
        "description": "Listed as ORG/NC; the ORG pin is NC on 93LC46A devices, which are always x8 organization, so this pin has no internal connection."
      },
      {
        "number": "7",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection."
      },
      {
        "number": "8",
        "name": "VCC",
        "type": "power_in",
        "description": "Power supply, 2.5 V to 5.5 V for the 93LC46A (VCC must be 4.5 V for proper operation of WRAL)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: MPN '93LC46A-I' has no package suffix (the datasheet's ordering code uses /SN for SOIC, optional X f; Pin 6 is printed as 'ORG/NC' in the pin table. The datasheet says the ORG pin is NC on A/B devices, "
        ],
        "pages_sent": 17,
        "cost_usd": 0.0993,
        "at": "2026-10-26T19:19:01"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/ebf121773e88563a80cb6a0f1362cc87.pdf",
        "pages": 38,
        "sha256": "96937bef2b6c48eb",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "93lc46a-i.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-26",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "93lc46a-i-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "309cb0151dea35aa8292999aeadc71f0f045bf233131c70610c4a08684ee776f",
        "checked": "2026-10-26",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}