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93LC46

Microchip Tech · Pre-ordered MCUs · SOIC-8

93LC46 from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Chip Select: a high level selects the device, a low level deselects it and forces Standby mode; must be low for at least 250 ns (TCSL) between consecutive instructions.
2 CLK input Serial Data Clock that synchronizes communication; opcode, address and data bits are clocked in and out on the positive edge, with 2 MHz max for VCC ≥ 4.5V and 1 MHz otherwise.
3 DI input Serial Data Input used to clock in the Start bit, opcode, address and data synchronously with CLK.
4 DO tri_state Serial Data Output that outputs read data synchronously with CLK (TPD max 400 ns), provides Ready/Busy status during erase/write, and is High-Z otherwise.
5 VSS power_in Ground.
6 ORG input Memory configuration select: tied to VCC selects x16 organization, tied to VSS selects x8; may be floated only for x16 at clock speeds of 1 MHz or less.
7 NU unconnected Not Utilized pin.
8 VCC power_in Power supply, 2.5V to 5.5V per the DC characteristics (pin table prints +1.8V to 5.5V), absolute maximum 6.5V.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Single Chip Microcomputer/Microcontroller
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input/output voltage w.r.t. VSS -0.6 V All inputs and outputs w.r.t. VSS; upper limit VCC + 1.0V 2
Storage temperature -65 150 °C 2
Ambient temperature with power applied -40 125 °C 2
Supply voltage range VCC 2.5 5.5 V 2
Operating temperature (Industrial) TA -40 85 °C Industrial (I) 2
High-level input voltage VIH1 2 V VCC ≥ 2.7V 2
High-level input voltage VIH2 0.7 VCC VCC < 2.7V 2
Low-level input voltage VIL1 -0.3 0.8 V VCC ≥ 2.7V 2
Low-level input voltage VIL2 -0.3 0.2 VCC VCC < 2.7V 2
Low-level output voltage VOL1 0.4 V IOL = 2.1 mA, VCC = 4.5V 2
Low-level output voltage VOL2 0.3 V IOL = 100 µA, VCC = 2.5V 2
High-level output voltage VOH1 2.4 V IOL = 400 µA, VCC = 4.5V 2
Input leakage current ILI -10 10 µA VIN = 0.1V to VCC 2
Output leakage current ILO -10 10 µA VOUT = 0.1V to VCC 2
Pin capacitance (all inputs/outputs) CIN, COUT 7 pF VIN/VOUT = 0V (Note 1 & 2), TA = 25°C, FCLK = 1 MHz 2
Operating current (write) ICC write 3 mA FCLK = 2 MHz, VCC = 5.5V (Note 2) 2
Clock high time TCKH 250 ns 3
Clock low time TCKL 250 ns 3
Chip select setup time TCSS 50 ns Relative to CLK 3
Chip select hold time TCSH 0 ns Relative to CLK 3
Chip select low time TCSL 250 ns 3
Data input setup time TDIS 100 ns Relative to CLK 3
Data input hold time TDIH 100 ns Relative to CLK 3
Data output delay time TPD 400 ns CL = 100 pF 3
Data output disable time TCZ 100 ns CL = 100 pf (Note 2) 3
Status valid time TSV 500 ns CL = 100 pF 3
Program cycle time TWC 4 10 ms Erase/Write mode 3
ERAL cycle time TEC 8 15 ms ERAL mode (VCC=5V ±10%) 3
WRAL cycle time TWL 16 30 ms WRAL mode (VCC=5V ±10%) 3

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin packages. The rotated pin-out 93LC46X/56X/66X are offered in the “SN” package only. 1

CAD (KiCad official)

  • Symbol: 93LC46
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 93lc46-etched.step / 93lc46-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 93lc46.step / 93lc46.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (20 pp, sha256 4505cc44abc8619f, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF