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93AA66CT-I

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Microchip Tech EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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93AA66CT-I

Microchip Tech · EEPROM · SOIC-8

93AA66CT-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Chip select: a high level selects the device and a low level deselects it into Standby mode, and CS must be low for 250 ns minimum (TCSL) between consecutive instructions.
2 CLK input Serial clock: opcodes, address and data bits are clocked in on the positive edge of CLK, and data bits are also clocked out on the positive edge of CLK.
3 DI input Serial data input used to clock in the Start bit, opcode, address and data synchronously with the CLK input.
4 DO output Serial data output used in Read mode to output data synchronously with CLK (TPD after the positive edge of CLK), also providing Ready/Busy status during erase and write cycles.
5 VSS power_in Ground reference for the device.
6 ORG input Memory organization select on the 93XX66C: tied to VCC/logic high selects x16 organization and tied to VSS/logic low selects x8, and it must be tied to a valid logic level.
7 NC unconnected No internal connection.
8 VCC power_in Power supply; the 93AA66C operates from 1.8V to 5.5V per the device selection table.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage absolute maximum VCC 7 V 3
Storage temperature -65 150 °C 3
Ambient temperature with power applied -40 125 °C 3
All inputs and outputs w.r.t. VSS -0.6 V VCC +1.0V upper bound not numeric 3
Supply voltage operating range VCC 1.8 5.5 V Industrial (I) 3
Ambient temperature operating range TA -40 85 °C Industrial (I) 3
High-level Input Voltage VIH1 2 V VCC ≥ 2.7V; max printed as VCC +1 V 3
Low-level Input Voltage VIL1 -0.3 0.8 V VCC ≥ 2.7V 3
Low-level Input Voltage VIL2 -0.3 V VCC < 2.7V; max printed as 0.2 VCC 3
Low-level Output Voltage VOL1 0.4 V IOL = 2.1 mA, VCC = 4.5V 3
Low-level Output Voltage VOL2 0.2 V IOL = 100 µA, VCC = 2.5V 3
High-level Output Voltage VOH1 2.4 V IOH = -400 µA, VCC = 4.5V 3
Input Leakage Current ILI -1 1 µA VIN = VSS or VCC 3
Output Leakage Current ILO -1 1 µA VOUT = VSS or VCC 3
Pin Capacitance (all inputs/outputs) CIN 7 pF VIN/VOUT = 0V (Note 1) 3
Write Current ICC write 2 mA FCLK = 3 MHz, Vcc = 5.5V 3
Read Current ICC read 1 mA FCLK = 3 MHz, VCC = 5.5V 3
Read Current ICC read 500 µA FCLK = 2 MHz, VCC = 3.0V 3
Standby Current ICCS 1 µA I-Temp, CS = 0V, ORG = DI = CLK = VSS or VCC (Note 2) (Note 3) 3
Clock Frequency FCLK 3 MHz 4.5V ≤ VCC < 5.5V, 93XX66C only 4
Clock Frequency FCLK 2 MHz 2.5V ≤ VCC < 5.5V 4
Clock Frequency FCLK 1 MHz 1.8V ≤ VCC < 2.5V 4
Clock High Time TCKH 200 ns 4.5V ≤ VCC < 5.5V, 93XX66C only 4
Clock High Time TCKH 250 ns 2.5V ≤ VCC < 5.5V 4
Clock High Time TCKH 450 ns 1.8V ≤ VCC < 2.5V 4
Clock Low Time TCKL 100 ns 4.5V ≤ VCC < 5.5V, 93XX66C only 4
Clock Low Time TCKL 200 ns 2.5V ≤ VCC < 5.5V 4
Clock Low Time TCKL 450 ns 1.8V ≤ VCC < 2.5V 4
Chip Select Setup Time TCSS 50 ns 4.5V ≤ VCC < 5.5V 4
Chip Select Setup Time TCSS 100 ns 2.5V ≤ VCC < 4.5V 4
Chip Select Setup Time TCSS 250 ns 1.8V ≤ VCC < 2.5V 4
Chip Select Hold Time TCSH 0 ns 1.8V ≤ VCC < 5.5V 4
Chip Select Low Time TCSL 250 ns 1.8V ≤ VCC < 5.5V 4
Data Input Setup Time TDIS 50 ns 4.5V ≤ VCC < 5.5V, 93XX66C only 4
Data Input Setup Time TDIS 100 ns 2.5V ≤ VCC < 5.5V 4
Data Input Setup Time TDIS 250 ns 1.8V ≤ VCC < 2.5V 4
Data Input Hold Time TDIH 50 ns 4.5V ≤ VCC < 5.5V, 93XX66C only 4
Data Input Hold Time TDIH 100 ns 2.5V ≤ VCC < 5.5V 4
Data Input Hold Time TDIH 250 ns 1.8V ≤ VCC < 2.5V 4
Data Output Delay Time TPD 200 ns 4.5V ≤ VCC < 5.5V, CL = 100 pF 4
Data Output Delay Time TPD 250 ns 2.5V ≤ VCC < 4.5V, CL = 100 pF 4
Data Output Delay Time TPD 400 ns 1.8V ≤ VCC < 2.5V, CL = 100 pF 4
Data Output Disable Time TCZ 100 ns 4.5V ≤ VCC < 5.5V, (Note 1) 4
Data Output Disable Time TCZ 200 ns 1.8V ≤ VCC < 4.5V, (Note 1) 4
Status Valid Time TSV 200 ns 4.5V ≤ VCC < 5.5V, CL = 100 pF 4
Status Valid Time TSV 300 ns 2.5V ≤ VCC < 4.5V, CL = 100 pF 4
Status Valid Time TSV 500 ns 1.8V ≤ VCC < 2.5V, CL = 100 pF 4
Program Cycle Time TWC 6 ms Erase/Write mode (AA and LC versions) 5
Erase All Cycle Time TEC 6 ms ERAL mode, 4.5V VCC 5.5V 5
Write All Cycle Time TWL 15 ms WRAL mode, 4.5V VCC 5.5V 5
Endurance 1 M cycles +25°C, VCC = 5.0V (Note 2) 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin Part Number VCC Range ORG Pin Word Size Temperature Ranges Packages 93AA66A 1.8V-5.5V No 8-bit I MC, MS, P, SN, OT, MN,ST 1

CAD (KiCad official)

  • Symbol: 93AA66CT-I
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 93aa66ct-i-etched.step / 93aa66ct-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 93aa66ct-i.step / 93aa66ct-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (43 pp, sha256 04494d6624e9f111, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF