component
93AA56AT-I
Public Made by Adomby adom
Microchip Tech EEPROM, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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93AA56AT-I
Microchip Tech · EEPROM · SOT-23-6
93AA56AT-I from Microchip Tech, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DO | output | Data Out outputs read data synchronously with CLK (TPD after the positive CLK edge) and also indicates Ready/Busy status during erase/write when CS is brought high after TCSL. |
| 2 | VSS | power_in | Ground reference pin for the device. |
| 3 | DI | input | Data In clocks in the Start bit, opcode, address and data synchronously with the CLK input. |
| 4 | CLK | input | Serial Clock synchronizes communication; opcodes, address and data bits are clocked in on the positive edge of CLK, and CLK is a don't care while CS is low. |
| 5 | CS | input | Chip Select: high selects the device and low deselects it into Standby mode, with CS held low for 250 ns minimum (TCSL) between consecutive instructions. |
| 6 | VCC | power_in | Power supply pin; the 93AA56A is specified for 1.8 V to 5.5 V operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-6 |
| Category | Memory |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-level input voltage (VIH1) | VIH1 | 2 | V | VCC 2.7V | 3 | ||
| Low-level input voltage (VIL1) | VIL1 | -0.3 | 0.8 | V | VCC 2.7V | 3 | |
| Low-level input voltage (VIL2) | VIL2 | -0.3 | V | VCC < 2.7V | 3 | ||
| Low-level output voltage (VOL1) | Vol1 | 0.4 | V | IOL = 2.1 mA, VCC = 4.5V | 3 | ||
| Low-level output voltage (VOL2) | Vol2 | 0.2 | µA | IOL = 100 µA, VCC = 2.5V | 3 | ||
| High-level output voltage (VOH1) | VOH1 | 2.4 | V | IOH = -400 µA, VCC = 4.5V | 3 | ||
| Input leakage current | ILI | -1 | 1 | µA | VIN = VSS or VCC | 3 | |
| Output leakage current | ILO | -1 | 1 | µA | VOUT = VSS or VCC | 3 | |
| Pin capacitance (all inputs/outputs) | CIN, COUT | 7 | pF | VIN/VOUT = 0V (Note 1); TA = 25°C, FCLK = 1 MHz | 3 | ||
| Standby current (I-temp) | ICCS | 1 | µA | I, Temp; CLK = CS = 0V; ORG = DI = VSS or VCC | 3 | ||
| Supply voltage VCC (absolute maximum) | VCC | 7 | V | 3 | |||
| All inputs and outputs w.r.t. VSS (absolute minimum) | -0.6 | V | w.r.t. VSS | 3 | |||
| Storage temperature | -65 | 150 | °C | 3 | |||
| Ambient temperature with power applied | -40 | 125 | °C | 3 | |||
| Supply voltage VCC (recommended) | VCC | 1.8 | 5.5 | V | Industrial (I) | 3 | |
| Ambient temperature TA (recommended) | TA | -40 | 85 | °C | Industrial (I) | 3 | |
| Clock frequency (FCLK) | FCLK | 2 | MHz | 2.5V VCC < 5.5V | 4 | ||
| Clock frequency (FCLK) | FCLK | 1 | MHz | 1.8V VCC < 2.5V | 4 | ||
| Clock high time (TCKH) | TCKH | 250 | ns | 2.5V VCC < 5.5V | 4 | ||
| Clock high time (TCKH) | TCKH | 450 | ns | 1.8V VCC < 2.5V | 4 | ||
| Clock low time (TCKL) | TCKL | 200 | ns | 2.5V VCC < 5.5V | 4 | ||
| Clock low time (TCKL) | TCKL | 450 | ns | 1.8V VCC < 2.5V | 4 | ||
| Chip Select setup time (TCSS) | TCSS | 50 | ns | 4.5V VCC < 5.5V | 4 | ||
| Chip Select setup time (TCSS) | TCSS | 100 | ns | 2.5V VCC < 4.5V | 4 | ||
| Chip Select setup time (TCSS) | TCSS | 250 | ns | 1.8V VCC < 2.5V | 4 | ||
| Chip Select hold time (TCSH) | TCSH | 0 | ns | 1.8V VCC < 5.5V | 4 | ||
| Chip Select low time (TCSL) | TCSL | 250 | ns | 1.8V VCC < 5.5V | 4 | ||
| Data input setup time (TDIS) | TDIS | 100 | ns | 2.5V VCC < 5.5V | 4 | ||
| Data input setup time (TDIS) | TDIS | 250 | ns | 1.8V VCC < 2.5V | 4 | ||
| Data input hold time (TDIH) | TDIH | 100 | ns | 2.5V VCC < 5.5V | 4 | ||
| Data input hold time (TDIH) | TDIH | 250 | ns | 1.8V VCC < 2.5V | 4 | ||
| Data output delay time (TPD) | TPD | 200 | ns | 4.5V VCC < 5.5V, CL = 100 pF | 4 | ||
| Data output delay time (TPD) | TPD | 250 | ns | 2.5V VCC < 4.5V, CL = 100 pF | 4 | ||
| Data output delay time (TPD) | TPD | 400 | ns | 1.8V VCC < 2.5V, CL = 100 pF | 4 | ||
| Data output disable time (TCZ) | TCZ | 100 | ns | 4.5V VCC < 5.5V, (Note 1) | 4 | ||
| Data output disable time (TCZ) | TCZ | 200 | ns | 1.8V VCC < 4.5V, (Note 1) | 4 | ||
| Status valid time (TSV) | TSV | 200 | ns | 4.5V VCC < 5.5V, CL = 100 pF | 4 | ||
| Status valid time (TSV) | TSV | 300 | ns | 2.5V VCC < 4.5V, CL = 100 pF | 4 | ||
| Status valid time (TSV) | TSV | 500 | ns | 1.8V VCC < 2.5V, CL = 100 pF | 4 | ||
| Program cycle time (TWC) | TWC | 6 | ms | Erase/Write mode (AA and LC versions) | 4 | ||
| ERAL mode time (TEC) | TEC | 6 | ms | ERAL mode, 4.5V VCC 5.5V | 4 | ||
| WRAL mode time (TWL) | TWL | 15 | ms | WRAL mode, 4.5V VCC 5.5V | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | SOT-23, 8-lead 2x3 DFN/TDFN and 8-lead TSSOP. All packages are Pb-free (Matte Tin) finish. | 1 |
CAD (KiCad official)
- Symbol:
93AA56AT-I - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
93aa56at-i-etched.step/93aa56at-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);93aa56at-i.step/93aa56at-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (36 pp, sha256
f9a7698e3531a357, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).