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Generated by kicad-footprint-generator · KiCad file format 20260206

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853S006AGILF

RENESAS · Clock Buffers/Drivers/Distributions · TSSOP-20

853S006AGILF from RENESAS, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VCC	power_in	Positive supply pin; the device operates with VCC from 2.375V to 3.465V in LVPECL mode.
2	nQ0	output	Inverting differential output of pair 0 with LVPECL interface levels.
3	Q0	output	Non-inverting differential output of pair 0 with LVPECL interface levels.
4	nQ1	output	Inverting differential output of pair 1 with LVPECL interface levels.
5	Q1	output	Non-inverting differential output of pair 1 with LVPECL interface levels.
6	nQ2	output	Inverting differential output of pair 2 with LVPECL interface levels.
7	Q2	output	Non-inverting differential output of pair 2 with LVPECL interface levels.
8	VCC	power_in	Positive supply pin; the device operates with VCC from 2.375V to 3.465V in LVPECL mode.
9	PCLK	input	Non-inverting differential LVPECL clock input with an internal 75kΩ pulldown resistor.
10	nPCLK	input	Inverting differential LVPECL clock input with an internal 50kΩ pullup/pulldown; defaults to VCC/2 when left floating.
11	VBB	output	Bias voltage reference output; VBB sink/source current is limited to ±0.5mA.
12	VEE	power_in	Negative supply pin; VEE is 0V in LVPECL mode and -2.375V to -3.465V in ECL mode.
13	VCC	power_in	Positive supply pin; the device operates with VCC from 2.375V to 3.465V in LVPECL mode.
14	nQ3	output	Inverting differential output of pair 3 with LVPECL interface levels.
15	Q3	output	Non-inverting differential output of pair 3 with LVPECL interface levels.
16	nQ4	output	Inverting differential output of pair 4 with LVPECL interface levels.
17	Q4	output	Non-inverting differential output of pair 4 with LVPECL interface levels.
18	nQ5	output	Inverting differential output of pair 5 with LVPECL interface levels.
19	Q5	output	Non-inverting differential output of pair 5 with LVPECL interface levels.
20	VCC	power_in	Positive supply pin; the device operates with VCC from 2.375V to 3.465V in LVPECL mode.

Key specifications

Parameter	Value
Manufacturer	RENESAS
Package	TSSOP-20
Category	Clock And Timing
Pins	20

CAD (KiCad official)

Symbol: 853S006AGILF
Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
3D model: TSSOP-20 (KiCad packages3D, STEP)
3D model files: 853s006agilf-etched.step / 853s006agilf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 853s006agilf.step / 853s006agilf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: RENESAS datasheet (20 pp, sha256 7f33d1a67ccafed9, retrieved 2026-10-28, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF