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8535AGI-01LFT

Public Made by Adom

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RENESAS Clock Buffers/Drivers/Distributions, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentclock and timing8535agi-01lftfactory-2.0.0extractor-text

Verified 8535AGI-01LFT

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier lcsc, 20 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: 8535AGI-01LFT · TSSOP-20 · 20 pins
  • ✓copper: 20 copper pads, none touching another net
  • ✓datasheet: all 20 pin names found in the 17-page datasheet
  • ✓distributor: lcsc C6100193, digikey 6690-8535AGI-01LFTTR-ND, mouser 972-8535AGI-01LFT
  • ✓family: TSSOP-20_4.4x6.5mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-2ki01458/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 20 pins = 20 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 20 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ 8535agi-01lft.kicad_sym✓ 8535agi-01lft.kicad_mod✓ 8535agi-01lft.step
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Ray Publish 0.1.0 750420e 3d ago

8535AGI-01LFT

RENESAS · Clock Buffers/Drivers/Distributions · TSSOP-20

8535AGI-01LFT from RENESAS, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VEE power_in Negative supply pin.
2 CLK_EN input Clock enable input with internal pull-up; when HIGH the outputs follow the clock input, and when LOW Q outputs are forced low and nQ outputs forced high, with LVCMOS/LVTTL interface levels.
3 CLK_SEL input Clock select input with internal pull-down; when HIGH selects CLK1, when LOW selects CLK0, with LVCMOS/LVTTL interface levels.
4 CLK0 input Clock input with internal pull-down accepting LVCMOS/LVTTL input levels.
5 nc unconnected Unused; no internal connection.
6 CLK1 input Clock input with internal pull-down accepting LVCMOS/LVTTL input levels.
7 nc unconnected Unused; no internal connection.
8 nc unconnected Unused; no internal connection.
9 nc unconnected Unused; no internal connection.
10 VCC power_in Positive power supply pin for the 3.3V device.
11 nQ3 output Inverted differential LVPECL output of fanout pair 3; LVPECL interface levels.
12 Q3 output Non-inverted differential LVPECL output of fanout pair 3; LVPECL interface levels.
13 VCC power_in Positive power supply pin for the 3.3V device.
14 nQ2 output Inverted differential LVPECL output of fanout pair 2; LVPECL interface levels.
15 Q2 output Non-inverted differential LVPECL output of fanout pair 2; LVPECL interface levels.
16 nQ1 output Inverted differential LVPECL output of fanout pair 1; LVPECL interface levels.
17 Q1 output Non-inverted differential LVPECL output of fanout pair 1; LVPECL interface levels.
18 VCC power_in Positive power supply pin for the 3.3V device.
19 nQ0 output Inverted differential LVPECL output of fanout pair 0; LVPECL interface levels.
20 Q0 output Non-inverted differential LVPECL output of fanout pair 0; LVPECL interface levels.

Key specifications

Parameter Value
Manufacturer RENESAS
Package TSSOP-20
Category Clock And Timing
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
High-level input voltage, CLK0/CLK1 (max VCC + 0.3 V) VIH 2 V 4
High-level input voltage, CLK_SEL/CLK_EN (max VCC + 0.3 V) VIH 2 V 4
Input high current, CLK0/CLK1/CLK_SEL IIH 150 µA VIN = VCC = 3.465V 4
Input high current, CLK_EN IIH 5 µA VIN = VCC = 3.465V 4
Input low current, CLK0/CLK1/CLK_SEL IIL -5 µA VIN = 0V, VCC = 3.465V 4
Input low current, CLK_EN IIL -150 µA VIN = 0V, VCC = 3.465V 4
Peak-to-peak output voltage swing VSWING 1 V 4
Output skew tsk(o) 30 ps NOTE 2 5
Supply voltage (absolute maximum) VCC 4.6 V 4
Inputs voltage VI (absolute max: min -0.5 V, max VCC + 0.5 V) VI -0.5 V 4
Continuous output current IO 50 mA Continuous current 4
Surge output current IO 100 mA Surge current 4
Storage temperature TSTG -65 150 °C 4
Ambient operating temperature TA -40 85 °C Ambient operating temperature 1
Maximum recommended junction temperature Tj 125 °C 10
Package thermal resistance θJA, multi-layer PCB θJA 73.2 °C/W 0 lfpm (JEDEC multi-layer) 10
Package thermal resistance θJA, multi-layer PCB θJA 66.6 °C/W 200 lfpm (JEDEC multi-layer) 10
Package thermal resistance θJA, multi-layer PCB θJA 63.5 °C/W 500 lfpm (JEDEC multi-layer) 10
Package thermal resistance θJA, single-layer PCB θJA 114.5 °C/W 0 lfpm (JEDEC single-layer) 10
Package thermal resistance θJA, single-layer PCB θJA 98 °C/W 200 lfpm (JEDEC single-layer) 10
Package thermal resistance θJA, single-layer PCB θJA 88 °C/W 500 lfpm (JEDEC single-layer) 10

CAD (KiCad official)

  • Symbol: 8535AGI-01LFT
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: 8535agi-01lft-etched.step / 8535agi-01lft-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 8535agi-01lft.step / 8535agi-01lft.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (17 pp, sha256 7c6622be7e78addf, retrieved 2026-10-31, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF