component
8533AGI-01LFT
Public Made by Adomby adom
RENESAS Clock Buffers, Drivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "8533agi-01lft",
"version": "0.1.0",
"type": "component",
"description": "RENESAS Clock Buffers, Drivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"clock and timing",
"8533agi-01lft",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"8533agi-01lft.kicad_sym",
"8533agi-01lft.kicad_mod",
"8533agi-01lft.glb",
"8533agi-01lft.step",
"8533agi-01lft.lbr",
"docs/hero.png",
"docs/8533agi-01lft-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"8533agi-01lft-hero.glb",
"8533agi-01lft-hero.overlay.json",
"8533agi-01lft-etched.glb"
],
"component": {
"mpn": "8533AGI-01LFT",
"manufacturer": "RENESAS",
"package": "TSSOP-20",
"pin_count": 20,
"category": "Clock and Timing",
"subcategory": "Clock Buffers, Drivers",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/394cc53b4f527bc5afad46398e9f391c.pdf",
"parts": {
"symbol": "8533agi-01lft.kicad_sym",
"footprint": "8533agi-01lft.kicad_mod",
"model_3d": "8533agi-01lft-hero.glb",
"model_3d_plain": "8533agi-01lft-etched.glb",
"model_3d_step": "8533agi-01lft-etched.step",
"model_3d_step_plain": "8533agi-01lft.step",
"lbr": "8533agi-01lft.lbr"
},
"distributor_links": {
"lcsc": "C2673002",
"digikey": "6690-8533AGI-01LFTTR-ND",
"mouser": "972-8533AGI-01LFT"
},
"distributor_check": {
"checked_at": "2026-10-31T00:18:52Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "6690-8533AGI-01LFTTR-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "972-8533AGI-01LFT",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "VEE",
"type": "power_in",
"description": "Negative supply pin."
},
{
"number": "2",
"name": "CLK_EN",
"type": "input",
"description": "Synchronizing clock enable with internal pull-up; when HIGH the clock outputs follow the clock input, and when LOW Q outputs are forced low and nQ outputs forced high, with LVCMOS/LVTTL interface levels."
},
{
"number": "3",
"name": "CLK_SEL",
"type": "input",
"description": "Clock select with internal pull-down; when HIGH it selects PCLK/nPCLK inputs and when LOW it selects CLK/nCLK inputs, with LVCMOS/LVTTL interface levels."
},
{
"number": "4",
"name": "CLK",
"type": "input",
"description": "Non-inverting differential clock input with internal pull-down, accepting LVDS, LVPECL, LVHSTL, SSTL and HCSL levels."
},
{
"number": "5",
"name": "nCLK",
"type": "input",
"description": "Inverting differential clock input with internal pull-up, accepting LVDS, LVPECL, LVHSTL, SSTL and HCSL levels."
},
{
"number": "6",
"name": "PCLK",
"type": "input",
"description": "Non-inverting differential LVPECL clock input with internal pull-down, accepting LVPECL, CML and SSTL levels."
},
{
"number": "7",
"name": "nPCLK",
"type": "input",
"description": "Inverting differential LVPECL clock input with internal pull-up, accepting LVPECL, CML and SSTL levels."
},
{
"number": "8",
"name": "nc",
"type": "unconnected",
"description": "No connect."
},
{
"number": "9",
"name": "nc",
"type": "unconnected",
"description": "No connect."
},
{
"number": "10",
"name": "VCC",
"type": "power_in",
"description": "Positive supply pin; VCC is specified at 3.135 V to 3.465 V (3.3 V ±5%)."
},
{
"number": "11",
"name": "nQ3",
"type": "output",
"description": "Inverting differential LVPECL output of pair 3, designed to drive 50Ω transmission lines with termination to VCC - 2V."
},
{
"number": "12",
"name": "Q3",
"type": "output",
"description": "Non-inverting differential LVPECL output of pair 3, designed to drive 50Ω transmission lines with termination to VCC - 2V."
},
{
"number": "13",
"name": "VCC",
"type": "power_in",
"description": "Positive supply pin; VCC is specified at 3.135 V to 3.465 V (3.3 V ±5%)."
},
{
"number": "14",
"name": "nQ2",
"type": "output",
"description": "Inverting differential LVPECL output of pair 2, designed to drive 50Ω transmission lines with termination to VCC - 2V."
},
{
"number": "15",
"name": "Q2",
"type": "output",
"description": "Non-inverting differential LVPECL output of pair 2, designed to drive 50Ω transmission lines with termination to VCC - 2V."
},
{
"number": "16",
"name": "nQ1",
"type": "output",
"description": "Inverting differential LVPECL output of pair 1, designed to drive 50Ω transmission lines with termination to VCC - 2V."
},
{
"number": "17",
"name": "Q1",
"type": "output",
"description": "Non-inverting differential LVPECL output of pair 1, designed to drive 50Ω transmission lines with termination to VCC - 2V."
},
{
"number": "18",
"name": "VCC",
"type": "power_in",
"description": "Positive supply pin; VCC is specified at 3.135 V to 3.465 V (3.3 V ±5%)."
},
{
"number": "19",
"name": "nQ0",
"type": "output",
"description": "Inverting differential LVPECL output of pair 0, designed to drive 50Ω transmission lines with termination to VCC - 2V."
},
{
"number": "20",
"name": "Q0",
"type": "output",
"description": "Non-inverting differential LVPECL output of pair 0, designed to drive 50Ω transmission lines with termination to VCC - 2V."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Package match: MPN 8533AGI-01LFT is listed in the Table 9 ordering information as 20-lead 'Lead Free; The datasheet gives no pin-level electrical limits for VEE; the VEE description is limited to 'Negat; Pin descriptions for outputs add the termination note from the LVPECL DC/AC tables and Application I"
],
"pages_sent": 19,
"cost_usd": 0.0765,
"at": "2026-10-31T00:18:38"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/394cc53b4f527bc5afad46398e9f391c.pdf",
"pages": 19,
"sha256": "d5dbe9589dbdb190",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 20,
"described": 20,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "8533agi-01lft.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
6.5,
1.2
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",
"checked": "2026-10-31",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "8533agi-01lft-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
6.5,
1.2
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "9abd42ae54b20bc2a56aa8aad6a98f704cc336e19a717c71a6d7ea4fb16b635a",
"checked": "2026-10-31",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
],
"package_dims": {
"package_code": "G (20 lead TSSOP)",
"source_page": 15,
"D": {
"nom_mm": 6.5,
"range_mm": [
6.4,
6.6
]
},
"E1": {
"nom_mm": 4.4,
"range_mm": [
4.3,
4.5
]
},
"E": {
"nom_mm": 6.4,
"range_mm": [
null,
null
]
},
"e": {
"nom_mm": 0.65,
"range_mm": [
null,
null
]
},
"A": {
"nom_mm": 1.2,
"range_mm": [
null,
1.2
]
},
"source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
"model_check": {
"file": "8533agi-01lft.step",
"verdict": "PASS",
"reasons": [
"height and body within the datasheet's package drawing"
],
"by": "factory/package_fit.py"
}
}
}
}