85314BGI-01LF

{
  "schema_version": 1,
  "type": "component",
  "slug": "85314bgi-01lf",
  "title": "85314BGI-01LF",
  "brief": "RENESAS Clock Buffers, Drivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
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    "clock and timing",
    "85314bgi-01lf",
    "factory-2.0.0",
    "extractor-text"
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  "component": {
    "mpn": "85314BGI-01LF",
    "manufacturer": "RENESAS",
    "package": "TSSOP-20",
    "pin_count": 20,
    "category": "Clock and Timing",
    "subcategory": "Clock Buffers, Drivers",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/fa0098697bdfaba54cf2d7dc6be88aa2.pdf",
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      "lbr": "85314bgi-01lf.lbr"
    },
    "distributor_links": {
      "lcsc": "C1520103",
      "digikey": "800-1167-5-ND",
      "mouser": "972-85314BGI-01LF"
    },
    "distributor_check": {
      "checked_at": "2026-10-31T12:18:48Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "800-1167-5-ND",
        "status": "found",
        "lifecycle": "Obsolete"
      },
      "mouser": {
        "pn": "972-85314BGI-01LF",
        "status": "found",
        "lifecycle": "End of Life"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "Q0",
        "type": "output",
        "description": "Non-inverting output of differential pair 0 with LVPECL interface levels."
      },
      {
        "number": "2",
        "name": "nQ0",
        "type": "output",
        "description": "Inverting output of differential pair 0 with LVPECL interface levels."
      },
      {
        "number": "3",
        "name": "Q1",
        "type": "output",
        "description": "Non-inverting output of differential pair 1 with LVPECL interface levels."
      },
      {
        "number": "4",
        "name": "nQ1",
        "type": "output",
        "description": "Inverting output of differential pair 1 with LVPECL interface levels."
      },
      {
        "number": "5",
        "name": "Q2",
        "type": "output",
        "description": "Non-inverting output of differential pair 2 with LVPECL interface levels."
      },
      {
        "number": "6",
        "name": "nQ2",
        "type": "output",
        "description": "Inverting output of differential pair 2 with LVPECL interface levels."
      },
      {
        "number": "7",
        "name": "Q3",
        "type": "output",
        "description": "Non-inverting output of differential pair 3 with LVPECL interface levels."
      },
      {
        "number": "8",
        "name": "nQ3",
        "type": "output",
        "description": "Inverting output of differential pair 3 with LVPECL interface levels."
      },
      {
        "number": "9",
        "name": "Q4",
        "type": "output",
        "description": "Non-inverting output of differential pair 4 with LVPECL interface levels."
      },
      {
        "number": "10",
        "name": "nQ4",
        "type": "output",
        "description": "Inverting output of differential pair 4 with LVPECL interface levels."
      },
      {
        "number": "11",
        "name": "VEE",
        "type": "power_in",
        "description": "Negative supply pin, VEE = 0V."
      },
      {
        "number": "12",
        "name": "CLK_SEL",
        "type": "input",
        "description": "Clock select input with internal pulldown; HIGH selects CLK1, LOW selects CLK0/nCLK0, LVTTL/LVCMOS levels."
      },
      {
        "number": "13",
        "name": "nc",
        "type": "unconnected",
        "description": "No connect."
      },
      {
        "number": "14",
        "name": "nCLK0",
        "type": "input",
        "description": "Inverting differential clock input with internal pullup."
      },
      {
        "number": "15",
        "name": "CLK0",
        "type": "input",
        "description": "Non-inverting differential clock input with internal pulldown."
      },
      {
        "number": "16",
        "name": "CLK1",
        "type": "input",
        "description": "Single-ended clock input with internal pulldown, LVTTL/LVCMOS interface levels."
      },
      {
        "number": "17",
        "name": "nc",
        "type": "unconnected",
        "description": "No connect."
      },
      {
        "number": "18",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply pin, VCC = 2.375V to 3.8V."
      },
      {
        "number": "19",
        "name": "nCLK_EN",
        "type": "input",
        "description": "Synchronizing clock enable with internal pulldown; LOW lets outputs follow clock input, HIGH forces Q low and nQ high, LVTTL/LVCMOS levels."
      },
      {
        "number": "20",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply pin, VCC = 2.375V to 3.8V."
      }
    ],
    "provenance": {
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        "guards": "pin_guards 0.1: passed",
        "guard_notes": [],
        "pages_sent": 21,
        "cost_usd": 0.1438,
        "at": "2026-10-31T12:18:41"
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        "pages": 21,
        "sha256": "3c7b07c6943cb885",
        "source_tier": "lcsc"
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        "described": 20,
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      "Pins": "20"
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    "characteristics": {
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          "name": "Peak-to-Peak Output Voltage Swing",
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        {
          "name": "Output Skew TSSOP",
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          "name": "Output Rise/Fall Time",
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          "kind": "timing",
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          "max": null,
          "conditions": "Integration Range: (12kHz - 20MHz)",
          "source_page": 5,
          "source": "datasheet"
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          "typ": 4,
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          "name": "Input Pullup Resistor",
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