component
850S1201BGILFT
Public Made by Adomby adom
RENESAS Clock Buffers, Drivers, Distributors, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "850s1201bgilft",
"title": "850S1201BGILFT",
"brief": "RENESAS Clock Buffers, Drivers, Distributors, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"clock-timing",
"850s1201bgilft",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "850S1201BGILFT",
"manufacturer": "RENESAS",
"package": "TSSOP-20",
"pin_count": 20,
"category": "Clock/Timing",
"subcategory": "Clock Buffers, Drivers, Distributors",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/663275fa7b464845551f6c1c85f13209.pdf",
"parts": {
"symbol": "850s1201bgilft.kicad_sym",
"footprint": "850s1201bgilft.kicad_mod",
"model_3d": "850s1201bgilft-hero.glb",
"model_3d_plain": "850s1201bgilft-etched.glb",
"model_3d_step": "850s1201bgilft-etched.step",
"model_3d_step_plain": "850s1201bgilft.step",
"lbr": "850s1201bgilft.lbr"
},
"distributor_links": {
"lcsc": "C7199383",
"digikey": "6690-850S1201BGILFTTR-ND",
"mouser": "972-850S1201BGILFT"
},
"distributor_check": {
"checked_at": "2026-10-28T16:44:46Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "6690-850S1201BGILFTTR-ND",
"status": "found"
},
"mouser": {
"pn": "972-850S1201BGILFT",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "CLK8",
"type": "input",
"description": "Single-ended clock input with LVCMOS/LVTTL interface levels and an internal pulldown resistor."
},
{
"number": "2",
"name": "CLK9",
"type": "input",
"description": "Single-ended clock input with LVCMOS/LVTTL interface levels and an internal pulldown resistor."
},
{
"number": "3",
"name": "CLK10",
"type": "input",
"description": "Single-ended clock input with LVCMOS/LVTTL interface levels and an internal pulldown resistor."
},
{
"number": "4",
"name": "CLK11",
"type": "input",
"description": "Single-ended clock input with LVCMOS/LVTTL interface levels and an internal pulldown resistor."
},
{
"number": "5",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin; the datasheet specifies 3.135V to 3.465V for 3.3V ±5% operation or 2.375V to 2.625V for 2.5V ±5% operation."
},
{
"number": "6",
"name": "CLK_SEL0",
"type": "input",
"description": "Clock select input (LSB of the 4-bit select code) with LVCMOS/LVTTL interface levels and an internal pulldown resistor."
},
{
"number": "7",
"name": "CLK_SEL1",
"type": "input",
"description": "Clock select input with LVCMOS/LVTTL interface levels and an internal pulldown resistor."
},
{
"number": "8",
"name": "CLK_SEL2",
"type": "input",
"description": "Clock select input with LVCMOS/LVTTL interface levels and an internal pulldown resistor."
},
{
"number": "9",
"name": "CLK_SEL3",
"type": "input",
"description": "Clock select input (MSB of the 4-bit select code) with LVCMOS/LVTTL interface levels and an internal pulldown resistor."
},
{
"number": "10",
"name": "OE",
"type": "input",
"description": "Output enable pin for the Q output with LVCMOS/LVTTL interface levels and an internal pullup resistor."
},
{
"number": "11",
"name": "Q",
"type": "output",
"description": "Single-ended clock output with LVCMOS/LVTTL interface levels; output impedance is 20 at VDD = 3.3V ±5% and 25 at VDD = 2.5V ±5%."
},
{
"number": "12",
"name": "GND",
"type": "power_in",
"description": "Power supply ground."
},
{
"number": "13",
"name": "CLK0",
"type": "input",
"description": "Single-ended clock input with LVCMOS/LVTTL interface levels and an internal pulldown resistor."
},
{
"number": "14",
"name": "CLK1",
"type": "input",
"description": "Single-ended clock input with LVCMOS/LVTTL interface levels and an internal pulldown resistor."
},
{
"number": "15",
"name": "CLK2",
"type": "input",
"description": "Single-ended clock input with LVCMOS/LVTTL interface levels and an internal pulldown resistor."
},
{
"number": "16",
"name": "CLK3",
"type": "input",
"description": "Single-ended clock input with LVCMOS/LVTTL interface levels and an internal pulldown resistor."
},
{
"number": "17",
"name": "CLK4",
"type": "input",
"description": "Single-ended clock input with LVCMOS/LVTTL interface levels and an internal pulldown resistor."
},
{
"number": "18",
"name": "CLK5",
"type": "input",
"description": "Single-ended clock input with LVCMOS/LVTTL interface levels and an internal pulldown resistor."
},
{
"number": "19",
"name": "CLK6",
"type": "input",
"description": "Single-ended clock input with LVCMOS/LVTTL interface levels and an internal pulldown resistor."
},
{
"number": "20",
"name": "CLK7",
"type": "input",
"description": "Single-ended clock input with LVCMOS/LVTTL interface levels and an internal pulldown resistor."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pin numbers for CLK_SEL0 to CLK_SEL3 are given in Table 2 as a grouped row '6, 7, 8, 9' with names i"
],
"pages_sent": 14,
"cost_usd": 0.0166,
"at": "2026-10-28T16:44:37"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/663275fa7b464845551f6c1c85f13209.pdf",
"pages": 14,
"sha256": "f35cb54ca34ca9d4",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 20,
"described": 20,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "850s1201bgilft.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
6.5,
1.2
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",
"checked": "2026-10-28",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "850s1201bgilft-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
6.5,
1.2
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "2decbafde989e9ff4b71adb747d34c03e5729cbb3754db539586d428602ca65e",
"checked": "2026-10-28",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "RENESAS",
"Package": "TSSOP-20",
"Category": "Clock/Timing",
"Pins": "20"
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"850s1201bgilft"
],
"discovery_pitch": "850S1201BGILFT (RENESAS) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
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"path": "docs/hero.png"
},
"files": [
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"850s1201bgilft.kicad_sym",
"850s1201bgilft.kicad_mod",
"850s1201bgilft.glb",
"850s1201bgilft.step",
"850s1201bgilft.lbr",
"docs/hero.png",
"docs/850s1201bgilft-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"850s1201bgilft-hero.glb",
"850s1201bgilft-hero.overlay.json",
"850s1201bgilft-etched.glb"
],
"visibility": {
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}
}