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80N03

HL · MOSFETs · TO-252

80N03 from HL, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-source voltage limited to ±20 V (VGS), with threshold of 1 to 2.5 V.
2 D passive Drain, connected to the exposed tab (center lead is trimmed in the pictured package); VDS 30 V max, continuous ID 80 A at TC=25°C.
3 S passive Source; body-diode continuous source current up to 80 A.

Key specifications

Parameter Value
Manufacturer HL
Package TO-252
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 30 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID 80 A VGS=10V, TC=25℃ 1
Continuous Drain Current ID 50 A VGS=10V, TC=100℃ 1
Continuous Drain Current (10s) ID 30 A VGS=10V, TA=25℃, t<=10s 1
Continuous Drain Current (steady state) ID 19 A VGS=10V, TA=25℃, steady state 1
Continuous Drain Current (10s) ID 25 A VGS=10V, TA=70℃, t<=10s 1
Continuous Drain Current (steady state) ID 16 A VGS=10V, TA=70℃, steady state 1
Pulsed Drain Current IDM 192 A 1
Single Pulse Avalanche Energy EAS 144.7 mJ VDD=25V, VGS=10V, L=0.1mH, IAS=53.8A 1
Avalanche Current IAS 53.8 A 1
Total Power Dissipation PD 62.5 W T=25℃ (TC, as inferred) 1
Total Power Dissipation PD 6 W T=25℃ (TA, as inferred) 1
Storage Temperature Range TSTG -55 175 ℃ 1
Operating Junction Temperature Range TJ -55 175 ℃ 1
Thermal Resistance Junction-Ambient (steady state) RθJA 62 ℃/W Surface mounted on 1 inch2 FR-4 board, 2OZ copper (note 1) 1
Thermal Resistance Junction-Ambient (t<=10s) RθJA 25 ℃/W Surface mounted on 1 inch2 FR-4 board, 2OZ copper (note 1) 1
Thermal Resistance Junction-Case RθJC 2.4 ℃/W 1
Drain-Source Breakdown Voltage BVDSS 30 V VGS=0V, ID=250uA 2
Static Drain-Source On-Resistance RDS(ON) 4.8 6 mΩ VGS=10V, ID=30A 2
Static Drain-Source On-Resistance RDS(ON) 7.8 9 mΩ VGS=4.5V, ID=15A 2
Gate Threshold Voltage VGS(th) 1 1.5 2.5 V VDS=VGS, ID=250uA 2
Drain-Source Leakage Current (TJ=25℃) IDSS 1 uA VDS=24V, VGS=0V, TJ=25℃ 2
Drain-Source Leakage Current (TJ=55) IDSS 5 uA VDS=24V, VGS=0V, TJ=55 2
Gate-Source Leakage Current IGSS -100 100 nA VGS=20V, VDS=0V 2
Gate Resistance Rg 1.4 2.8 Ω f=1MHz 2
Input Capacitance Ciss 3075 4000 pF VDS=15V, VGS=0V, f=1MHz 2
Output Capacitance Coss 400 530 pF VDS=15V, VGS=0V, f=1MHz 2
Continuous Source Current IS 80 A VG=VD=0V, force current 2
Pulsed Source Current ISM 132 A 2
Diode Forward Voltage VSD 1 V VGS=0V, IS=1A, TJ=25℃ 2

CAD (KiCad official)

  • Symbol: 80N03
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: 80n03-etched.step / 80n03-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 80n03.step / 80n03.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HL datasheet (5 pp, sha256 ac8020b93f0e9d6c, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF