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Contents

README

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7N65L-TN3-R

UTC(Unisonic Tech) · MOSFETs · TO-252

7N65L-TN3-R from UTC(Unisonic Tech), in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate terminal of the 7N65 N-channel MOSFET, with VGSS rated at ±30 V in the absolute maximum ratings.
2 Drain passive Drain terminal of the 7N65 N-channel MOSFET, rated for VDSS 650 V and 7 A continuous drain current in the absolute maximum ratings.
3 Source passive Source terminal of the 7N65 N-channel MOSFET, serving as the common return for the gate and drain ratings listed in the absolute maximum ratings.

Key specifications

Parameter Value
Manufacturer UTC(Unisonic Tech)
Package TO-252
Category Transistors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS 650 V 3
Gate-Source Voltage VGSS -30 30 V 3
Continuous Drain Current ID 7 A 3
Pulsed Drain Current IDM 14 A 3
Avalanche Energy Single Pulsed EAS 281.3 mJ Note 3: L=10mH, IAS=7.5A, VDD=50V, RG=25Ω, starting TJ=25°C 3
Peak Diode Recovery dv/dt dv/dt 2.3 V/ns Note 4: ISD≤7.0A, di/dt≤200A/μs, VDD≤BVDSS, starting TJ=25°C 3
Power Dissipation TO-251/TO-252 PD 48 W TO-251/TO-252 3
Junction Temperature TJ 150 °C 3
Storage Temperature TSTG -55 150 °C 3
Junction to Ambient TO-251/TO-252 θJA 110 °C/W 3
Junction to Case TO-251/TO-252 θJC 2.6 °C/W Note: device mounted on FR-4 substrate PC board, 2oz copper, with 1inch square copper plate 3
Drain-Source Breakdown Voltage BVDSS 650 V VGS=0V, ID=250μA 4
Drain-Source Leakage Current IDSS 10 μA VDS=650V, VGS=0V 4
Gate-Source Leakage Current Forward IGSS 100 nA VGS=30V, VDS=0V 4
Gate-Source Leakage Current Reverse IGSS -100 nA VGS=-30V, VDS=0V 4
Gate Threshold Voltage VGS(TH) 2 4 V VDS=VGS, ID=250μA 4
Static Drain-Source On-State Resistance RDS(ON) 1.3 Ω VGS=10V, ID=3.5A 4
Input Capacitance CISS 870 pF VDS=25V, VGS=0V, f=1.0MHz 4
Output Capacitance COSS 97 pF VDS=25V, VGS=0V, f=1.0MHz 4
Reverse Transfer Capacitance CRSS 9.6 pF VDS=25V, VGS=0V, f=1.0MHz 4
Total Gate Charge QG 22 nC VDS=520V, VGS=10V, ID=7A, IG=1mA (Note 1, 2) 4
Gate-Source Charge QGS 5 nC VDS=520V, VGS=10V, ID=7A, IG=1mA (Note 1, 2) 4
Gate-Drain Charge QGD 5.5 nC VDS=520V, VGS=10V, ID=7A, IG=1mA (Note 1, 2) 4
Turn-On Delay Time tD(ON) 12 ns VDS=100V, VGS=10V, ID=7A, RG=25Ω (Note 1, 2) 4
Turn-On Rise Time tR 20 ns VDS=100V, VGS=10V, ID=7A, RG=25Ω (Note 1, 2) 4
Turn-Off Delay Time tD(OFF) 74 ns VDS=100V, VGS=10V, ID=7A, RG=25Ω (Note 1, 2) 4
Turn-Off Fall Time tF 33 ns VDS=100V, VGS=10V, ID=7A, RG=25Ω (Note 1, 2) 4
Maximum Body-Diode Continuous Current IS 7 A 4
Maximum Body-Diode Pulsed Current ISM 14 A 4
Drain-Source Diode Forward Voltage VSD 1.4 V IS=7A, VGS=0V 4
Reverse Recovery Time trr 506 ns IS=7A, VGS=0V, di/dt=100A/μs 4
Reverse Recovery Charge Qrr 2.7 μC IS=7A, VGS=0V, di/dt=100A/μs 4

CAD (KiCad official)

  • Symbol: 7N65L-TN3-R
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: 7n65l-tn3-r-etched.step / 7n65l-tn3-r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 7n65l-tn3-r.step / 7n65l-tn3-r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UTC(Unisonic Tech) datasheet (9 pp, sha256 57598e94798562f7, retrieved 2026-11-02, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF