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Ray 79l12: specified limits as data (metadata.characteristics, 16 rows from the datasheet) 2c2b436

79L12

TWGMC · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89

79L12 from TWGMC, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground / common reference pin. Common return for input and output; for a negative regulator this pin is the most-positive terminal.
2 IN power_in Unregulated negative input voltage. Absolute max Vi = -35 V; typical operating range -14.5 V to -27 V. Bypass with a 0.33 uF capacitor (Ci) close to the pin.
3 OUT power_out Regulated -12 V output (typ). Delivers up to 100 mA (IOM 0.1 A). Bypass with a 0.1 uF capacitor (Co) close to the pin for optimum stability and transient response.

Key specifications

Parameter Value
Manufacturer TWGMC
Package SOT-89
Category PMIC
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output Voltage Vo -11.5 -12 -12.5 V 25℃ 1
Output Voltage Vo -11.4 -12 -12.6 V -14.5V≤Vl≤-27V, Io=1mA~40mA 1
Load Regulation ΔVo 24 100 mV Io=1mA~100mA, 25℃ 1
Load Regulation ΔVo 15 50 mV Io=1mA~40mA, 25℃ 1
Line Regulation ΔVo 50 250 mV -14.5V≤Vl≤-27V, 25℃ 1
Line Regulation ΔVo 40 200 mV -16V≤Vl≤-27V, 25℃ 1
Quiescent Current Iq 6.5 mA 25℃ 1
Quiescent Current Change ΔIq 1.5 mA -16V≤Vl≤-27V, 0-125℃ 1
Quiescent Current Change ΔIq 0.1 mA 1mA≤IO≤40mA, 0-125℃ 1
Output Noise Voltage VN 80 μV 10Hz≤f≤100KHz, 25℃ 1
Ripple Rejection RR 37 42 dB -15V≤Vl≤-25V, f=120Hz, 0-125℃ 1
Dropout Voltage Vd 1.7 V 25℃ 1
Input Voltage Vl -35 V 1
Operating Junction Temperature Range TOPR 0 150 ℃ 1
Storage Temperature Range TSTG -55 150 ℃ 1
Maximum Output Current IOM 0.1 A 1

CAD (KiCad official)

  • Symbol: 79L12
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89 (KiCad packages3D, STEP)
  • 3D model files: 79l12-etched.step / 79l12-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 79l12.step / 79l12.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
79l12.step 57 KB You want the bare part, or you mark your own boards.
79l12-etched.step 820 KB You want the part with 79L12 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 227 faces against 42 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TWGMC datasheet (2 pp, sha256 c1a0d6c49d6d3487, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF