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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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docs 78l33: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
78l33-etched.fit.json 78l33: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
78l33-etched.glb 78l33: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
78l33-etched.step 78l33: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
78l33.glb Publish 0.1.0 · Ray 2mo ago
78l33.kicad_mod Publish 0.1.0 · Ray 2mo ago
78l33.kicad_sym Publish 0.1.0 · Ray 2mo ago
78l33.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray 2mo ago
78l33.step Publish 0.1.0 · Ray 2mo ago
package.json Publish 0.2.0 · Ray 2mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
page.json 78l33: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 28d ago
README.md 78l33: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

78L33

Shikues · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3

78L33 from Shikues, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Regulated +3.3 V output. Delivers up to 150 mA. Recommended output bypass capacitor Co = 0.1 µF; not required for stability but improves transient response.
2 GND power_in Common ground reference. A common ground is required between the input and output voltages.
3 VIN power_in Unregulated positive supply input. Absolute max VIN = 30 V; must remain typically 2.0 V above VOUT (dropout ~2 V at IO=100 mA). Recommended input bypass capacitor Cin = 0.33 µF.

Key specifications

Parameter Value
Manufacturer Shikues
Package SOT-89-3
Category PMIC
Pins 3

CAD (KiCad official)

  • Symbol: 78L33
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89-3 (KiCad packages3D, STEP)
  • 3D model files: 78l33-etched.step / 78l33-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 78l33.step / 78l33.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
78l33.step 57 KB You want the bare part, or you mark your own boards.
78l33-etched.step 1.0 MB You want the part with 78L33 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 268 faces against 42 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shikues datasheet (7 pp, sha256 2f2bf1f5a553c543, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF