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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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docs 78l24: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
78l24-etched.fit.json 78l24: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
78l24-etched.glb 78l24: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
78l24-etched.step 78l24: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
78l24.glb Publish 0.1.0 · Ray 2mo ago
78l24.kicad_mod Publish 0.1.0 · Ray 2mo ago
78l24.kicad_sym Publish 0.1.0 · Ray 2mo ago
78l24.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray 2mo ago
78l24.step Publish 0.1.0 · Ray 2mo ago
package.json Publish 0.2.0 · Ray 2mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
page.json 78l24: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 28d ago
README.md 78l24: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

78L24

Shikues · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89

78L24 from Shikues, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Regulated +24V output, up to 150 mA. Output voltage tolerance is ±5% (±4% over 1-40 mA / 7-18 V VIN). A 0.1 µF output capacitor is recommended for improved transient response.
2 GND power_in Common ground reference for both input and output. Also carries the regulator's quiescent current (typ 3 mA, max 5.5 mA at VIN=10 V, IO=40 mA).
3 VIN power_in Unregulated positive input supply. Must be at least ~2 V above VOUT (dropout ≈ 2 V at 100 mA) and must not exceed VIN(MAX) = 30 V. A 0.33 µF bypass capacitor close to this pin is recommended.

Key specifications

Parameter Value
Manufacturer Shikues
Package SOT-89
Category PMIC
Pins 3

CAD (KiCad official)

  • Symbol: 78L24
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89 (KiCad packages3D, STEP)
  • 3D model files: 78l24-etched.step / 78l24-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 78l24.step / 78l24.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
78l24.step 57 KB You want the bare part, or you mark your own boards.
78l24-etched.step 913 KB You want the part with 78L24 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 248 faces against 42 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shikues datasheet (7 pp, sha256 2f2bf1f5a553c543, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF