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78l18-etched.glb 78l18: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
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page.json 78l18: specified limits as data (metadata.characteristics, 24 rows from the datasheet) · Ray 20d ago
README.md 78l18: specified limits as data (metadata.characteristics, 24 rows from the datasheet) · Ray 20d ago

78L18

Shikues · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3

78L18 from Shikues, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Regulated +18 V output, up to 150 mA. A 0.1 uF ceramic capacitor to GND improves transient response but is not required for stability.
2 GND power_in Common ground reference. Must be shared between input and output. Quiescent current of ~3-5.5 mA flows out of this pin.
3 VIN power_in Unregulated input supply, typically at least VOUT + 2.0 V (dropout), maximum 30 V. Bypass with 0.33 uF close to the pin for stable operation.

Key specifications

Parameter Value
Manufacturer Shikues
Package SOT-89-3
Category PMIC
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output voltage tolerance (IO=40mA, VIN=10V), multiple of nominal VOUT VOUT 0.964 1.036 VOUT IO=40mA,VIN=10V 2
Output voltage tolerance (IO=1mA40mA, VIN=7V18V), multiple of nominal VOUT VOUT 0.96 1.04 VOUT IO=1mA40mA,VIN=7V18V 2
Output voltage tolerance (IO=1mA~10mA, VIN=10V), multiple of nominal VOUT VOUT 0.95 1.05 VOUT IO=1mA~10mA,VIN=10V 2
Output voltage accuracy -5 5 % 1
Line regulation LNR -150 150 mV VIN=7V~18V,IO=20mA 2
Line regulation LNR -100 100 mV VIN=8V~18V,IO=20mA 2
Load regulation LDR -100 100 mV VIN=10V,IO=1mA~100mA 2
Load regulation LDR -30 30 mV VIN=10V,IO=1mA~40mA 2
Quiescent current change ΔIq -1.5 1.5 mA VIN=8V~18V,IO=20mA 2
Quiescent current change ΔIq -0.1 0.1 mA VIN=10V,IO=1mA~40mA 2
Dropout voltage VDIF 2 V TA=25℃,IO=100mA 2
Quiescent current Iq 5.5 mA VIN=10V,IO=40mA 2
Output noise voltage VN 40 uV/VO F=10Hz~100KHz 2
Ripple rejection PSRR 80 dB TA=25℃,f=120Hz,IO=40mA,VIN=8V~20V 2
Nominal output voltage (78L18) VOUT 18 V 1
Input voltage VIN 30 V 1
Maximum output current IOUT 150 mA 1
Maximum power dissipation, SOT-89 Pmax 0.5 W SOT-89 package 1
Junction temperature TJ -55 150 ℃ 2
Operating temperature Topr -40 125 ℃ 2
Storage temperature range TSTG -55 155 ℃ 2
Soldering temperature 260 ℃ Recommended 10 s 2
ESD rating (HBM) 2 kV HBM 2
Input-output differential (typical) VIN-VOUT 2 V 4

CAD (KiCad official)

  • Symbol: 78L18
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89-3 (KiCad packages3D, STEP)
  • 3D model files: 78l18-etched.step / 78l18-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 78l18.step / 78l18.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shikues datasheet (7 pp, sha256 2f2bf1f5a553c543, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF