component

78L10

Public Made by Adom

by adom

Shikues Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentpmic78l10
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs 78l10: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
78l10-etched.fit.json 78l10: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
78l10-etched.glb 78l10: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
78l10-etched.step 78l10: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
78l10.glb Publish 0.1.0 · Ray 2mo ago
78l10.kicad_mod Publish 0.1.0 · Ray 2mo ago
78l10.kicad_sym Publish 0.1.0 · Ray 2mo ago
78l10.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray 2mo ago
78l10.step Publish 0.1.0 · Ray 2mo ago
package.json Publish 0.2.0 · Ray 2mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
page.json 78l10: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 28d ago
README.md 78l10: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

78L10

Shikues · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89

78L10 from Shikues, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulated +10 V output. Typical 10.0 V (9.5 V min / 10.5 V max at Tj = 25 C), rated up to 150 mA absolute maximum (100 mA continuous is the standard 78Lxx rating). Requires a 0.1 uF ceramic bypass capacitor to GND for stability.
2 GND power_in Common ground / device reference. On the SOT-89 package this pin is also fused to the large center tab used for heat spreading.
3 IN power_in Unregulated positive supply input. Must be at least ~1.7 V above VO (dropout) and within 12.5 V to 25 V for regulation; absolute maximum VI = 30 V. Bypass with 0.33 uF ceramic close to the pin.

Key specifications

Parameter Value
Manufacturer Shikues
Package SOT-89
Category PMIC
Pins 3

CAD (KiCad official)

  • Symbol: 78L10
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89 (KiCad packages3D, STEP)
  • 3D model files: 78l10-etched.step / 78l10-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 78l10.step / 78l10.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
78l10.step 57 KB You want the bare part, or you mark your own boards.
78l10-etched.step 904 KB You want the part with 78L10 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 245 faces against 42 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shikues datasheet (7 pp, sha256 a767b47e125b2a38, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF