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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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docs 78l06-150: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
78l06-150-etched.fit.json 78l06-150: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
78l06-150-etched.glb 78l06-150: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
78l06-150-etched.step 78l06-150: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
78l06-150.glb Publish 0.1.0 · Ray 2mo ago
78l06-150.kicad_mod Publish 0.1.0 · Ray 2mo ago
78l06-150.kicad_sym Publish 0.1.0 · Ray 2mo ago
78l06-150.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray 2mo ago
78l06-150.step Publish 0.1.0 · Ray 2mo ago
package.json Publish 0.2.0 · Ray 2mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
page.json 78l06-150: specified limits as data (metadata.characteristics, 5 rows from the datasheet) · Ray 21d ago
README.md 78l06-150: specified limits as data (metadata.characteristics, 5 rows from the datasheet) · Ray 21d ago

78L06-150

UMW · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3

78L06-150 from UMW, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Vout power_out Regulated +6 V output. Typical Vo = 6.0 V (5.94-6.06 V at Tj=25 °C). Deliver up to 150 mA; place a 0.1 µF ceramic to GND close to the pin for stability.
2 GND power_in Ground / common return for the regulator. Serves as the reference for both Vin and Vout; also the thermal path of the SOT-89 package (pin 2 = tab).
3 INPUT power_in Unregulated positive supply input. For Vo=6 V variant the input must be ≥ ~8 V (Vin ≥ Vout + 1.7 V dropout) and ≤ 35 V absolute maximum. Decouple with a 0.33 µF ceramic to GND close to the pin.

Key specifications

Parameter Value
Manufacturer UMW
Package SOT-89-3
Category PMIC
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output voltage VO 5.94 6 6.06 V TJ=25°C 4
Input voltage (for VO=3.3~18V) VI 35 V 2
High power dissipation PD 800 mW 2
Junction temperature range TOPR -40 105 °C 2
Storage temperature range TSTG -55 150 °C 2

CAD (KiCad official)

  • Symbol: 78L06-150
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89-3 (KiCad packages3D, STEP)
  • 3D model files: 78l06-150-etched.step / 78l06-150-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 78l06-150.step / 78l06-150.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
78l06-150.step 57 KB You want the bare part, or you mark your own boards.
78l06-150-etched.step 1.4 MB You want the part with 78L06-150 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 358 faces against 42 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (17 pp, sha256 fe2f4e8f0d975d52, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF