← Commit history

pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left)

Ray ·e60461158c ·2mo ago ·parent 25806a5
2 files changed +117−1
package.json+2−1
@@ -24,6 +24,7 @@     "docs/hero.png",     "docs/78l05u-datasheet.pdf",     "viewers/symbol.html",-    "viewers/footprint.html"+    "viewers/footprint.html",+    "pads.json"   ] }\ No newline at end of file
pads.jsonadded+115
@@ -0,0 +1,115 @@+{+ "schema": "adom.pads/1",+ "slug": "78l05u",+ "footprint": "SOT-89-3",+ "generated_from": {+  "footprint": "SOT-89-3@sha256:0b8db9f4a8f2547a",+  "pins": "page.json:component.pins",+  "overrides": null+ },+ "pin1": {+  "pad": "1",+  "at": [+   -1.95,+   -1.5+  ],+  "corner": "top-left",+  "source": "silk-marker",+  "derived_from": "SOT-89-3@sha256:0b8db9f4a8f2547a"+ },+ "pad_count": 3,+ "paste_apertures": 0,+ "issues": [],+ "pads": [+  {+   "pad": "1",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -1.95,+    -1.5+   ],+   "rot": 0.0,+   "size": [+    1.3,+    0.9+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "1",+   "name": "VO",+   "type": "power_out",+   "description": "Regulated +5 V output. Typical 5.0 V (4.75 V to 5.25 V) over 7 V ≤ VI ≤ 20 V and 1 mA ≤ IO ≤ 40 mA. Bypass with a 0.1 µF ceramic capacitor to GND close to the pin for stability.",+   "is_pin1": true,+   "source": {+    "geometry": "SOT-89-3.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "2",+   "kind": "smd",+   "shape": "custom",+   "at": [+    -1.8625,+    0.0+   ],+   "rot": 0.0,+   "size": [+    1.475,+    0.9+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "2",+   "name": "GND",+   "type": "power_in",+   "description": "Common ground reference for both input and output. In the SOT-89 package this pin is also the thermal tab, so its PCB copper acts as the primary heatsink for Ptot up to 800 mW.",+   "is_pin1": false,+   "source": {+    "geometry": "SOT-89-3.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "3",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -1.95,+    1.5+   ],+   "rot": 0.0,+   "size": [+    1.3,+    0.9+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "3",+   "name": "VI",+   "type": "power_in",+   "description": "Unregulated positive input supply, 7 V to 20 V for spec compliance (30 V absolute max). Bypass with a 0.33 µF capacitor to GND close to the pin to ensure loop stability and reject line transients.",+   "is_pin1": false,+   "source": {+    "geometry": "SOT-89-3.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  }+ ]+}\ No newline at end of file