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78L05

Public Made by Adom

by adom

UMW Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89-3. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs 78l05: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
78l05-etched.fit.json 78l05: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
78l05-etched.glb 78l05: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
78l05-etched.step 78l05: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
78l05.glb Publish 0.1.0 · Ray 2mo ago
78l05.kicad_mod Publish 0.1.0 · Ray 2mo ago
78l05.kicad_sym Publish 0.1.0 · Ray 2mo ago
78l05.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray 2mo ago
78l05.step Publish 0.1.0 · Ray 2mo ago
package.json Publish 0.2.0 · Ray 2mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
page.json 78l05: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 28d ago
README.md 78l05: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

78L05

UMW · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3

78L05 from UMW, in a SOT-89-3. Pinout and pin descriptions extracted from the datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Output power_out Regulated +5 V DC output (nominal 5.0 V, 4.8-5.2 V at TJ=25 °C). Supplies up to 100 mA to the load. A 0.1 µF ceramic bypass capacitor to GND is recommended for stability and transient response.
2 GND power_in Common ground reference for both input and output. Also carries the quiescent current (typ. 2 mA) of the regulator.
3 Input power_in Unregulated DC input supply. Recommended VI ≥ 7.5 V (for full-spec 5 V regulation); absolute maximum VI = 35 V. A 0.33 µF ceramic bypass capacitor to GND is recommended close to the pin, especially if the device is located far from the bulk filter capacitor.

Key specifications

Parameter Value
Manufacturer UMW
Package SOT-89-3
Category PMIC
Pins 3

CAD (KiCad official)

  • Symbol: 78L05
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89-3 (KiCad packages3D, STEP)
  • 3D model files: 78l05-etched.step / 78l05-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 78l05.step / 78l05.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
78l05.step 57 KB You want the bare part, or you mark your own boards.
78l05-etched.step 969 KB You want the part with 78L05 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 258 faces against 42 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (22 pp, sha256 3eeae843c9f51425, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF