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74VHCT32PW

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by adom

Nexperia Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74VHCT32PW

Nexperia · Logic Gates · TSSOP-14

74VHCT32PW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Data input 1A of the first OR gate; the inputs accept voltages higher than VCC and have Schmitt-trigger action.
2 1B input Data input 1B of the first OR gate; the inputs accept voltages higher than VCC and have Schmitt-trigger action.
3 1Y output Data output 1Y of the first OR gate; output current is limited to -25 mA to +25 mA (absolute maximum).
4 2A input Data input 2A of the second OR gate; the inputs accept voltages higher than VCC and have Schmitt-trigger action.
5 2B input Data input 2B of the second OR gate; the inputs accept voltages higher than VCC and have Schmitt-trigger action.
6 2Y output Data output 2Y of the second OR gate; output current is limited to -25 mA to +25 mA (absolute maximum).
7 GND power_in Ground (0 V) reference for all voltages on the device.
8 3Y output Data output 3Y of the third OR gate; output current is limited to -25 mA to +25 mA (absolute maximum).
9 3A input Data input 3A of the third OR gate; the inputs accept voltages higher than VCC and have Schmitt-trigger action.
10 3B input Data input 3B of the third OR gate; the inputs accept voltages higher than VCC and have Schmitt-trigger action.
11 4Y output Data output 4Y of the fourth OR gate; output current is limited to -25 mA to +25 mA (absolute maximum).
12 4A input Data input 4A of the fourth OR gate; the inputs accept voltages higher than VCC and have Schmitt-trigger action.
13 4B input Data input 4B of the fourth OR gate; the inputs accept voltages higher than VCC and have Schmitt-trigger action.
14 VCC power_in Supply voltage: 2.0 V to 5.5 V for the 74VHC32 and 4.5 V to 5.5 V for the 74VHCT32 (recommended operating range; absolute maximum -0.5 V to +7.0 V).

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC supply voltage VCC 4.5 5 5.5 V 4
input voltage VI 0 5.5 V 4
output voltage VO 0 V Printed maximum is VCC 4
ambient temperature Tamb -40 25 125 °C 4
input transition rise and fall rate Δt/ΔV 20 ns/V VCC = 4.5 V to 5.5 V 4
supply voltage VCC -0.5 7 V 4
input voltage VI -0.5 7 V 4
input clamping current IIK -20 mA VI < -0.5 V 4
output clamping current IOK -20 20 mA VO < -0.5 V or VO > VCC + 0.5 V 4
output current IO -25 25 mA VO = -0.5 V to (VCC + 0.5 V) 4
supply current ICC 75 mA 4
ground current IGND -75 mA 4
storage temperature Tstg -65 150 °C 4
total power dissipation Ptot 500 mW Tamb = -40 °C to +125 °C 4
HIGH-level input voltage VIH 2 V VCC = 4.5 V to 5.5 V; 25 °C 6
LOW-level input voltage VIL 0.8 V VCC = 4.5 V to 5.5 V; 25 °C 6
HIGH-level output voltage VOH 4.4 4.5 V VI = VIH or VIL; VCC = 4.5 V; IO = -50 μA; 25 °C 6
HIGH-level output voltage VOH 4.4 V VI = VIH or VIL; VCC = 4.5 V; IO = -50 μA; -40 °C to +125 °C 6
HIGH-level output voltage VOH 3.94 V VI = VIH or VIL; VCC = 4.5 V; IO = -8.0 mA; 25 °C 6
HIGH-level output voltage VOH 3.7 V VI = VIH or VIL; VCC = 4.5 V; IO = -8.0 mA; -40 °C to +125 °C 6
LOW-level output voltage VOL 0 0.1 V VI = VIH or VIL; VCC = 4.5 V; IO = 50 μA; 25 °C 6
LOW-level output voltage VOL 0.1 V VI = VIH or VIL; VCC = 4.5 V; IO = 50 μA; -40 °C to +125 °C 6
LOW-level output voltage VOL 0.36 V VI = VIH or VIL; VCC = 4.5 V; IO = 8.0 mA; 25 °C 6
LOW-level output voltage VOL 0.55 V VI = VIH or VIL; VCC = 4.5 V; IO = 8.0 mA; -40 °C to +125 °C 6
input leakage current II 0.1 μA VI = 5.5 V or GND; VCC = 0 V to 5.5 V; 25 °C 6
input leakage current II 2 μA VI = 5.5 V or GND; VCC = 0 V to 5.5 V; -40 °C to +125 °C 6
supply current ICC 2 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; 25 °C 6
supply current ICC 40 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; -40 °C to +125 °C 6
additional supply current ΔICC 1.35 mA per input pin; VI = VCC - 2.1 V; other pins at VCC or GND; IO = 0 A; VCC = 4.5 V to 5.5 V; 25 °C 6
additional supply current ΔICC 1.5 mA per input pin; VI = VCC - 2.1 V; other pins at VCC or GND; IO = 0 A; VCC = 4.5 V to 5.5 V; -40 °C to +125 °C 6
input capacitance CI 3 10 pF VI = VCC or GND; 25 °C 6
input capacitance CI 10 pF VI = VCC or GND; -40 °C to +125 °C 6
propagation delay tpd 3.1 6.9 ns nA, nB to nY; VCC = 4.5 V to 5.5 V; CL = 15 pF; 25 °C 7
propagation delay tpd 1 9 ns nA, nB to nY; VCC = 4.5 V to 5.5 V; CL = 15 pF; -40 °C to +125 °C 7
propagation delay tpd 4.3 7.9 ns nA, nB to nY; VCC = 4.5 V to 5.5 V; CL = 50 pF; 25 °C 7
propagation delay tpd 1 10 ns nA, nB to nY; VCC = 4.5 V to 5.5 V; CL = 50 pF; -40 °C to +125 °C 7

CAD (KiCad official)

  • Symbol: 74VHCT32PW
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: 74vhct32pw-etched.step / 74vhct32pw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74vhct32pw.step / 74vhct32pw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (14 pp, sha256 0d32ade98079e364, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF