component
74VHCT244PW
Public Made by Adomby adom
Nexperia Buffers, Drivers, Receivers, Transceivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
74VHCT244PW
Nexperia · Buffers, Drivers, Receivers, Transceivers · TSSOP-20
74VHCT244PW from Nexperia, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable input for buffer section 1, active LOW; a HIGH on 1OE forces outputs 1Y0 to 1Y3 into the high-impedance OFF-state. |
| 2 | 1A0 | input | Data input 1A0 of buffer section 1; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 3 | 2Y0 | tri_state | Data output 2Y0 of buffer section 2; 3-state output that goes high-impedance while 2OE is HIGH. |
| 4 | 1A1 | input | Data input 1A1 of buffer section 1; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 5 | 2Y1 | tri_state | Data output 2Y1 of buffer section 2; 3-state output that goes high-impedance while 2OE is HIGH. |
| 6 | 1A2 | input | Data input 1A2 of buffer section 1; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 7 | 2Y2 | tri_state | Data output 2Y2 of buffer section 2; 3-state output that goes high-impedance while 2OE is HIGH. |
| 8 | 1A3 | input | Data input 1A3 of buffer section 1; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 9 | 2Y3 | tri_state | Data output 2Y3 of buffer section 2; 3-state output that goes high-impedance while 2OE is HIGH. |
| 10 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 11 | 2A3 | input | Data input 2A3 of buffer section 2; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 12 | 1Y3 | tri_state | Data output 1Y3 of buffer section 1; 3-state output that goes high-impedance while 1OE is HIGH. |
| 13 | 2A2 | input | Data input 2A2 of buffer section 2; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 14 | 1Y2 | tri_state | Data output 1Y2 of buffer section 1; 3-state output that goes high-impedance while 1OE is HIGH. |
| 15 | 2A1 | input | Data input 2A1 of buffer section 2; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 16 | 1Y1 | tri_state | Data output 1Y1 of buffer section 1; 3-state output that goes high-impedance while 1OE is HIGH. |
| 17 | 2A0 | input | Data input 2A0 of buffer section 2; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 18 | 1Y0 | tri_state | Data output 1Y0 of buffer section 1; 3-state output that goes high-impedance while 1OE is HIGH. |
| 19 | 2OE | input | Output enable input for buffer section 2, active LOW; a HIGH on 2OE forces outputs 2Y0 to 2Y3 into the high-impedance OFF-state. |
| 20 | VCC | power_in | Supply voltage; recommended VCC is 2.0 V to 5.5 V for 74VHC244 and 4.5 V to 5.5 V for 74VHCT244. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| input voltage | VI | -0.5 | 7 | V | 4 | ||
| input clamping current | IIK | -20 | mA | VI < -0.5 V | 4 | ||
| output clamping current | IOK | -20 | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 4 | |
| output current | IO | -25 | 25 | mA | VO = -0.5 V to (VCC + 0.5 V) | 4 | |
| supply current | ICC | 75 | mA | 4 | |||
| ground current | IGND | -75 | mA | 4 | |||
| storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| total power dissipation | Ptot | 500 | mW | Tamb = -40 °C to +125 °C | 4 | ||
| supply voltage (74VHCT244) | VCC | 4.5 | 5 | 5.5 | V | 74VHCT244 column | 4 |
| input voltage (74VHCT244) | VI | 0 | 5.5 | V | 74VHCT244 column | 4 | |
| output voltage (74VHCT244) | VO | 0 | V | 74VHCT244 column; maximum printed as VCC | 4 | ||
| ambient temperature | Tamb | -40 | 25 | 125 | °C | 74VHCT244 column | 4 |
| input transition rise and fall rate (74VHCT244) | Δt/ΔV | 20 | ns/V | VCC = 5.0 V ± 0.5 V | 4 | ||
| HIGH-level input voltage (74VHCT244) | VIH | 2 | V | VCC = 4.5 V to 5.5 V; 25 °C | 6 | ||
| LOW-level input voltage (74VHCT244) | VIL | 0.8 | V | VCC = 4.5 V to 5.5 V; 25 °C | 6 | ||
| HIGH-level output voltage (74VHCT244) | VOH | 4.4 | 4.5 | V | VI = VIH or VIL; VCC = 4.5 V; IO = -50 μA; 25 °C | 6 | |
| HIGH-level output voltage (74VHCT244) | VOH | 4.4 | V | VI = VIH or VIL; VCC = 4.5 V; IO = -50 μA; -40 °C to +125 °C | 6 | ||
| HIGH-level output voltage (74VHCT244) | VOH | 3.94 | V | VI = VIH or VIL; VCC = 4.5 V; IO = -8.0 mA; 25 °C | 6 | ||
| HIGH-level output voltage (74VHCT244) | VOH | 3.7 | V | VI = VIH or VIL; VCC = 4.5 V; IO = -8.0 mA; -40 °C to +125 °C | 6 | ||
| LOW-level output voltage (74VHCT244) | VOL | 0 | 0.1 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 50 μA; 25 °C | 6 | |
| LOW-level output voltage (74VHCT244) | VOL | 0.1 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 50 μA; -40 °C to +125 °C | 6 | ||
| LOW-level output voltage (74VHCT244) | VOL | 0.36 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 8.0 mA; 25 °C | 6 | ||
| LOW-level output voltage (74VHCT244) | VOL | 0.55 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 8.0 mA; -40 °C to +125 °C | 6 | ||
| OFF-state output current (74VHCT244) | IOZ | -0.25 | 0.25 | μA | per input pin; VI = VIH or VIL; VCC = 5.5 V; IO = 0 A; VO = VCC or GND; other pins at VCC or GND; 25 °C | 6 | |
| OFF-state output current (74VHCT244) | IOZ | -10 | 10 | μA | per input pin; VI = VIH or VIL; VCC = 5.5 V; IO = 0 A; VO = VCC or GND; other pins at VCC or GND; -40 °C to +125 °C | 6 | |
| input leakage current (74VHCT244) | II | 0.1 | μA | VI = 5.5 V or GND; VCC = 0 V to 5.5 V; 25 °C | 6 | ||
| input leakage current (74VHCT244) | II | 2 | μA | VI = 5.5 V or GND; VCC = 0 V to 5.5 V; -40 °C to +125 °C | 6 | ||
| supply current (74VHCT244) | ICC | 4 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V; 25 °C | 6 | ||
| supply current (74VHCT244) | ICC | 80 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V; -40 °C to +125 °C | 6 | ||
| additional supply current (74VHCT244) | ΔICC | 1.35 | mA | per input pin; VI = VCC - 2.1 V; IO = 0 A; other pins at VCC or GND; VCC = 4.5 V to 5.5 V; 25 °C | 6 | ||
| additional supply current (74VHCT244) | ΔICC | 1.5 | mA | per input pin; VI = VCC - 2.1 V; IO = 0 A; other pins at VCC or GND; VCC = 4.5 V to 5.5 V; -40 °C to +125 °C | 6 | ||
| input capacitance (74VHCT244) | CI | 3 | 10 | pF | 25 °C | 6 | |
| input capacitance (74VHCT244) | CI | 10 | pF | -40 °C to +125 °C | 6 | ||
| propagation delay nAn to nYn (74VHCT244) | tpd | 3.5 | 7.4 | ns | see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 15 pF; 25 °C | 8 | |
| propagation delay nAn to nYn (74VHCT244) | tpd | 1 | 9.5 | ns | see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 15 pF; -40 °C to +125 °C | 8 | |
| propagation delay nAn to nYn (74VHCT244) | tpd | 5 | 8.4 | ns | see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 50 pF; 25 °C | 8 | |
| propagation delay nAn to nYn (74VHCT244) | tpd | 1 | 10.5 | ns | see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 50 pF; -40 °C to +125 °C | 8 | |
| enable time nOE to nYn (74VHCT244) | ten | 3.5 | 10.4 | ns | see Fig. 5; VCC = 4.5 V to 5.5 V; CL = 15 pF; 25 °C | 8 | |
| enable time nOE to nYn (74VHCT244) | ten | 1 | 13 | ns | see Fig. 5; VCC = 4.5 V to 5.5 V; CL = 15 pF; -40 °C to +125 °C | 8 | |
| enable time nOE to nYn (74VHCT244) | ten | 5.5 | 11.4 | ns | see Fig. 5; VCC = 4.5 V to 5.5 V; CL = 50 pF; 25 °C | 8 | |
| enable time nOE to nYn (74VHCT244) | ten | 1 | 14.5 | ns | see Fig. 5; VCC = 4.5 V to 5.5 V; CL = 50 pF; -40 °C to +125 °C | 8 | |
| disable time nOE to nYn (74VHCT244) | tdis | 5 | 9.4 | ns | see Fig. 5; VCC = 4.5 V to 5.5 V; CL = 15 pF; 25 °C | 8 | |
| disable time nOE to nYn (74VHCT244) | tdis | 1 | 12 | ns | see Fig. 5; VCC = 4.5 V to 5.5 V; CL = 15 pF; -40 °C to +125 °C | 8 | |
| disable time nOE to nYn (74VHCT244) | tdis | 7 | 11.4 | ns | see Fig. 5; VCC = 4.5 V to 5.5 V; CL = 50 pF; 25 °C | 8 | |
| disable time nOE to nYn (74VHCT244) | tdis | 1 | 14.5 | ns | see Fig. 5; VCC = 4.5 V to 5.5 V; CL = 50 pF; -40 °C to +125 °C | 8 | |
| total power dissipation derating (SOT360-1 TSSOP20) | Ptot | 10 | mW/K | derates linearly above 100 °C; Tamb-based footnote [2] | 4 |
CAD (KiCad official)
- Symbol:
74VHCT244PW - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
74vhct244pw-etched.step/74vhct244pw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74vhct244pw.step/74vhct244pw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (16 pp, sha256
968f26adab71bd2a, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74VHCT244PW
**Nexperia** · Buffers, Drivers, Receivers, Transceivers · TSSOP-20
74VHCT244PW from Nexperia, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable input for buffer section 1, active LOW; a HIGH on 1OE forces outputs 1Y0 to 1Y3 into the high-impedance OFF-state. |
| 2 | 1A0 | input | Data input 1A0 of buffer section 1; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 3 | 2Y0 | tri_state | Data output 2Y0 of buffer section 2; 3-state output that goes high-impedance while 2OE is HIGH. |
| 4 | 1A1 | input | Data input 1A1 of buffer section 1; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 5 | 2Y1 | tri_state | Data output 2Y1 of buffer section 2; 3-state output that goes high-impedance while 2OE is HIGH. |
| 6 | 1A2 | input | Data input 1A2 of buffer section 1; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 7 | 2Y2 | tri_state | Data output 2Y2 of buffer section 2; 3-state output that goes high-impedance while 2OE is HIGH. |
| 8 | 1A3 | input | Data input 1A3 of buffer section 1; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 9 | 2Y3 | tri_state | Data output 2Y3 of buffer section 2; 3-state output that goes high-impedance while 2OE is HIGH. |
| 10 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 11 | 2A3 | input | Data input 2A3 of buffer section 2; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 12 | 1Y3 | tri_state | Data output 1Y3 of buffer section 1; 3-state output that goes high-impedance while 1OE is HIGH. |
| 13 | 2A2 | input | Data input 2A2 of buffer section 2; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 14 | 1Y2 | tri_state | Data output 1Y2 of buffer section 1; 3-state output that goes high-impedance while 1OE is HIGH. |
| 15 | 2A1 | input | Data input 2A1 of buffer section 2; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 16 | 1Y1 | tri_state | Data output 1Y1 of buffer section 1; 3-state output that goes high-impedance while 1OE is HIGH. |
| 17 | 2A0 | input | Data input 2A0 of buffer section 2; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 18 | 1Y0 | tri_state | Data output 1Y0 of buffer section 1; 3-state output that goes high-impedance while 1OE is HIGH. |
| 19 | 2OE | input | Output enable input for buffer section 2, active LOW; a HIGH on 2OE forces outputs 2Y0 to 2Y3 into the high-impedance OFF-state. |
| 20 | VCC | power_in | Supply voltage; recommended VCC is 2.0 V to 5.5 V for 74VHC244 and 4.5 V to 5.5 V for 74VHCT244. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | | 7 | V | | 4 |
| input voltage | VI | -0.5 | | 7 | V | | 4 |
| input clamping current | IIK | -20 | | | mA | VI < -0.5 V | 4 |
| output clamping current | IOK | -20 | | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 4 |
| output current | IO | -25 | | 25 | mA | VO = -0.5 V to (VCC + 0.5 V) | 4 |
| supply current | ICC | | | 75 | mA | | 4 |
| ground current | IGND | -75 | | | mA | | 4 |
| storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| total power dissipation | Ptot | | | 500 | mW | Tamb = -40 °C to +125 °C | 4 |
| supply voltage (74VHCT244) | VCC | 4.5 | 5 | 5.5 | V | 74VHCT244 column | 4 |
| input voltage (74VHCT244) | VI | 0 | | 5.5 | V | 74VHCT244 column | 4 |
| output voltage (74VHCT244) | VO | 0 | | | V | 74VHCT244 column; maximum printed as VCC | 4 |
| ambient temperature | Tamb | -40 | 25 | 125 | °C | 74VHCT244 column | 4 |
| input transition rise and fall rate (74VHCT244) | Δt/ΔV | | | 20 | ns/V | VCC = 5.0 V ± 0.5 V | 4 |
| HIGH-level input voltage (74VHCT244) | VIH | 2 | | | V | VCC = 4.5 V to 5.5 V; 25 °C | 6 |
| LOW-level input voltage (74VHCT244) | VIL | | | 0.8 | V | VCC = 4.5 V to 5.5 V; 25 °C | 6 |
| HIGH-level output voltage (74VHCT244) | VOH | 4.4 | 4.5 | | V | VI = VIH or VIL; VCC = 4.5 V; IO = -50 μA; 25 °C | 6 |
| HIGH-level output voltage (74VHCT244) | VOH | 4.4 | | | V | VI = VIH or VIL; VCC = 4.5 V; IO = -50 μA; -40 °C to +125 °C | 6 |
| HIGH-level output voltage (74VHCT244) | VOH | 3.94 | | | V | VI = VIH or VIL; VCC = 4.5 V; IO = -8.0 mA; 25 °C | 6 |
| HIGH-level output voltage (74VHCT244) | VOH | 3.7 | | | V | VI = VIH or VIL; VCC = 4.5 V; IO = -8.0 mA; -40 °C to +125 °C | 6 |
| LOW-level output voltage (74VHCT244) | VOL | | 0 | 0.1 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 50 μA; 25 °C | 6 |
| LOW-level output voltage (74VHCT244) | VOL | | | 0.1 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 50 μA; -40 °C to +125 °C | 6 |
| LOW-level output voltage (74VHCT244) | VOL | | | 0.36 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 8.0 mA; 25 °C | 6 |
| LOW-level output voltage (74VHCT244) | VOL | | | 0.55 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 8.0 mA; -40 °C to +125 °C | 6 |
| OFF-state output current (74VHCT244) | IOZ | -0.25 | | 0.25 | μA | per input pin; VI = VIH or VIL; VCC = 5.5 V; IO = 0 A; VO = VCC or GND; other pins at VCC or GND; 25 °C | 6 |
| OFF-state output current (74VHCT244) | IOZ | -10 | | 10 | μA | per input pin; VI = VIH or VIL; VCC = 5.5 V; IO = 0 A; VO = VCC or GND; other pins at VCC or GND; -40 °C to +125 °C | 6 |
| input leakage current (74VHCT244) | II | | | 0.1 | μA | VI = 5.5 V or GND; VCC = 0 V to 5.5 V; 25 °C | 6 |
| input leakage current (74VHCT244) | II | | | 2 | μA | VI = 5.5 V or GND; VCC = 0 V to 5.5 V; -40 °C to +125 °C | 6 |
| supply current (74VHCT244) | ICC | | | 4 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V; 25 °C | 6 |
| supply current (74VHCT244) | ICC | | | 80 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V; -40 °C to +125 °C | 6 |
| additional supply current (74VHCT244) | ΔICC | | | 1.35 | mA | per input pin; VI = VCC - 2.1 V; IO = 0 A; other pins at VCC or GND; VCC = 4.5 V to 5.5 V; 25 °C | 6 |
| additional supply current (74VHCT244) | ΔICC | | | 1.5 | mA | per input pin; VI = VCC - 2.1 V; IO = 0 A; other pins at VCC or GND; VCC = 4.5 V to 5.5 V; -40 °C to +125 °C | 6 |
| input capacitance (74VHCT244) | CI | | 3 | 10 | pF | 25 °C | 6 |
| input capacitance (74VHCT244) | CI | | | 10 | pF | -40 °C to +125 °C | 6 |
| propagation delay nAn to nYn (74VHCT244) | tpd | | 3.5 | 7.4 | ns | see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 15 pF; 25 °C | 8 |
| propagation delay nAn to nYn (74VHCT244) | tpd | 1 | | 9.5 | ns | see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 15 pF; -40 °C to +125 °C | 8 |
| propagation delay nAn to nYn (74VHCT244) | tpd | | 5 | 8.4 | ns | see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 50 pF; 25 °C | 8 |
| propagation delay nAn to nYn (74VHCT244) | tpd | 1 | | 10.5 | ns | see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 50 pF; -40 °C to +125 °C | 8 |
| enable time nOE to nYn (74VHCT244) | ten | | 3.5 | 10.4 | ns | see Fig. 5; VCC = 4.5 V to 5.5 V; CL = 15 pF; 25 °C | 8 |
| enable time nOE to nYn (74VHCT244) | ten | 1 | | 13 | ns | see Fig. 5; VCC = 4.5 V to 5.5 V; CL = 15 pF; -40 °C to +125 °C | 8 |
| enable time nOE to nYn (74VHCT244) | ten | | 5.5 | 11.4 | ns | see Fig. 5; VCC = 4.5 V to 5.5 V; CL = 50 pF; 25 °C | 8 |
| enable time nOE to nYn (74VHCT244) | ten | 1 | | 14.5 | ns | see Fig. 5; VCC = 4.5 V to 5.5 V; CL = 50 pF; -40 °C to +125 °C | 8 |
| disable time nOE to nYn (74VHCT244) | tdis | | 5 | 9.4 | ns | see Fig. 5; VCC = 4.5 V to 5.5 V; CL = 15 pF; 25 °C | 8 |
| disable time nOE to nYn (74VHCT244) | tdis | 1 | | 12 | ns | see Fig. 5; VCC = 4.5 V to 5.5 V; CL = 15 pF; -40 °C to +125 °C | 8 |
| disable time nOE to nYn (74VHCT244) | tdis | | 7 | 11.4 | ns | see Fig. 5; VCC = 4.5 V to 5.5 V; CL = 50 pF; 25 °C | 8 |
| disable time nOE to nYn (74VHCT244) | tdis | 1 | | 14.5 | ns | see Fig. 5; VCC = 4.5 V to 5.5 V; CL = 50 pF; -40 °C to +125 °C | 8 |
| total power dissipation derating (SOT360-1 TSSOP20) | Ptot | | 10 | | mW/K | derates linearly above 100 °C; Tamb-based footnote [2] | 4 |
## CAD (KiCad official)
- Symbol: `74VHCT244PW`
- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`
- 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files: `74vhct244pw-etched.step` / `74vhct244pw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74vhct244pw.step` / `74vhct244pw.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588908635740758016) (16 pp, sha256 `968f26adab71bd2a`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74vhct244pw-datasheet.pdf)