component
74VHCT14PW
Public Made by Adomby adom
Nexperia Inverters, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74VHCT14PW
Nexperia · Inverters · TSSOP-14
74VHCT14PW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input 1A of the Schmitt-trigger inverter; it has Schmitt-trigger action and accepts voltages higher than VCC. |
| 2 | 1Y | output | Data output 1Y is the logic inverse of input 1A (L on 1A gives H on 1Y). |
| 3 | 2A | input | Data input 2A of the Schmitt-trigger inverter; it has Schmitt-trigger action and accepts voltages higher than VCC. |
| 4 | 2Y | output | Data output 2Y is the logic inverse of input 2A (L on 2A gives H on 2Y). |
| 5 | 3A | input | Data input 3A of the Schmitt-trigger inverter; it has Schmitt-trigger action and accepts voltages higher than VCC. |
| 6 | 3Y | output | Data output 3Y is the logic inverse of input 3A (L on 3A gives H on 3Y). |
| 7 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 8 | 4Y | output | Data output 4Y is the logic inverse of input 4A (L on 4A gives H on 4Y). |
| 9 | 4A | input | Data input 4A of the Schmitt-trigger inverter; it has Schmitt-trigger action and accepts voltages higher than VCC. |
| 10 | 5Y | output | Data output 5Y is the logic inverse of input 5A (L on 5A gives H on 5Y). |
| 11 | 5A | input | Data input 5A of the Schmitt-trigger inverter; it has Schmitt-trigger action and accepts voltages higher than VCC. |
| 12 | 6Y | output | Data output 6Y is the logic inverse of input 6A (L on 6A gives H on 6Y). |
| 13 | 6A | input | Data input 6A of the Schmitt-trigger inverter; it has Schmitt-trigger action and accepts voltages higher than VCC. |
| 14 | VCC | power_in | Supply voltage; limiting value is -0.5 V to +7.0 V and recommended operation is 4.5 V to 5.5 V for the 74VHCT14. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 4.5 | 5 | 5.5 | V | 4 | |
| Input voltage | VI | 0 | 5.5 | V | 4 | ||
| Output voltage | VO | 0 | V | 4 | |||
| Ambient temperature | Tamb | -40 | 25 | 125 | °C | 4 | |
| Supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| Input voltage | VI | -0.5 | 7 | V | 4 | ||
| Input clamping current | IIK | -20 | mA | VI < -0.5 V | 4 | ||
| Output clamping current | IOK | -20 | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 4 | |
| Output current | IO | -25 | 25 | mA | VO = -0.5 V to (VCC + 0.5 V) | 4 | |
| Supply current | ICC | 75 | mA | 4 | |||
| Ground current | IGND | -75 | mA | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Total power dissipation | Ptot | 500 | mW | Tamb = -40 °C to +125 °C | 4 | ||
| HIGH-level output voltage | VOH | 4.4 | 4.5 | V | VI = VT+ or VT-; IO = -50 μA; VCC = 4.5 V; -40 °C to +125 °C | 5 | |
| HIGH-level output voltage | VOH | 3.7 | V | IO = -8.0 mA; VCC = 4.5 V; -40 °C to +125 °C | 5 | ||
| LOW-level output voltage | VOL | 0 | 0.1 | V | VI = VT+ or VT-; IO = 50 μA; VCC = 4.5 V; -40 °C to +125 °C | 5 | |
| LOW-level output voltage | VOL | 0.55 | V | IO = 8.0 mA; VCC = 4.5 V; -40 °C to +125 °C | 5 | ||
| Input leakage current | II | 2 | μA | VI = 5.5 V or GND; VCC = 0 V to 5.5 V; -40 °C to +125 °C | 5 | ||
| Supply current | ICC | 40 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V; -40 °C to +125 °C | 5 | ||
| Additional supply current | ΔICC | 1.35 | 1.5 | mA | per input pin; VI = VCC - 2.1 V; other pins at VCC or GND; IO = 0 A; VCC = 4.5 V to 5.5 V; -40 °C to +125 °C | 5 | |
| Input capacitance | CI | 3 | 10 | pF | 5 | ||
| Positive-going threshold voltage | VT+ | 1.9 | V | VCC = 4.5 V; -40 °C to +125 °C | 8 | ||
| Positive-going threshold voltage | VT+ | 2.1 | V | VCC = 5.5 V; -40 °C to +125 °C | 8 | ||
| Negative-going threshold voltage | VT- | 0.5 | V | VCC = 4.5 V; -40 °C to +125 °C | 8 | ||
| Negative-going threshold voltage | VT- | 0.6 | V | VCC = 5.5 V; -40 °C to +125 °C | 8 | ||
| Hysteresis voltage | VH | 0.35 | 1.4 | V | VCC = 4.5 V; -40 °C to +125 °C | 8 | |
| Hysteresis voltage | VH | 0.35 | 1.5 | V | VCC = 5.5 V; -40 °C to +125 °C | 8 | |
| Propagation delay | tpd | 1 | 4 | 9 | ns | CL = 15 pF; VCC = 4.5 V to 5.5 V; see Fig. 4 | 6 |
| Propagation delay | tpd | 1 | 5.4 | 10 | ns | CL = 50 pF; VCC = 4.5 V to 5.5 V; see Fig. 4 | 6 |
| Power dissipation capacitance | CPD | 12 | pF | fi = 1 MHz; VI = GND to VCC | 6 | ||
| Output capacitance | CO | 4 | pF | 5 |
CAD (KiCad official)
- Symbol:
74VHCT14PW - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
74vhct14pw-etched.step/74vhct14pw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74vhct14pw.step/74vhct14pw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (16 pp, sha256
8b8eebb2ead7cc59, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed (audit)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).