74VHCT08AFT

{
  "slug": "74vhct08aft",
  "version": "0.1.0",
  "type": "component",
  "description": "TOSHIBA Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic",
    "74vhct08aft",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
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    "README.md",
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    "74vhct08aft.kicad_mod",
    "74vhct08aft.glb",
    "74vhct08aft.step",
    "74vhct08aft.lbr",
    "docs/hero.png",
    "docs/74vhct08aft-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "74vhct08aft-hero.glb",
    "74vhct08aft-hero.overlay.json",
    "74vhct08aft-etched.glb"
  ],
  "component": {
    "mpn": "74VHCT08AFT",
    "manufacturer": "TOSHIBA",
    "package": "TSSOP-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Logic Gates",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603330127296688128",
    "parts": {
      "symbol": "74vhct08aft.kicad_sym",
      "footprint": "74vhct08aft.kicad_mod",
      "model_3d": "74vhct08aft-hero.glb",
      "model_3d_plain": "74vhct08aft-etched.glb",
      "model_3d_step": "74vhct08aft-etched.step",
      "model_3d_step_plain": "74vhct08aft.step",
      "lbr": "74vhct08aft.lbr"
    },
    "distributor_links": {
      "lcsc": "C20247071"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T22:54:36Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "1A",
        "type": "input",
        "description": "Data input A of 2-input AND gate 1; accepts 0 to 5.5 V and is TTL-compatible (VIH min 2.0 V, VIL max 0.8 V at VCC 4.5 to 5.5 V)."
      },
      {
        "number": "2",
        "name": "1B",
        "type": "input",
        "description": "Data input B of 2-input AND gate 1; accepts 0 to 5.5 V and is TTL-compatible (VIH min 2.0 V, VIL max 0.8 V at VCC 4.5 to 5.5 V)."
      },
      {
        "number": "3",
        "name": "1Y",
        "type": "output",
        "description": "Output of 2-input AND gate 1 (Y = A AND B); absolute maximum DC output current is ±25 mA."
      },
      {
        "number": "4",
        "name": "2A",
        "type": "input",
        "description": "Data input A of 2-input AND gate 2; accepts 0 to 5.5 V and is TTL-compatible (VIH min 2.0 V, VIL max 0.8 V at VCC 4.5 to 5.5 V)."
      },
      {
        "number": "5",
        "name": "2B",
        "type": "input",
        "description": "Data input B of 2-input AND gate 2; accepts 0 to 5.5 V and is TTL-compatible (VIH min 2.0 V, VIL max 0.8 V at VCC 4.5 to 5.5 V)."
      },
      {
        "number": "6",
        "name": "2Y",
        "type": "output",
        "description": "Output of 2-input AND gate 2 (Y = A AND B); absolute maximum DC output current is ±25 mA."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V) for the device."
      },
      {
        "number": "8",
        "name": "3Y",
        "type": "output",
        "description": "Output of 2-input AND gate 3 (Y = A AND B); absolute maximum DC output current is ±25 mA."
      },
      {
        "number": "9",
        "name": "3A",
        "type": "input",
        "description": "Data input A of 2-input AND gate 3; accepts 0 to 5.5 V and is TTL-compatible (VIH min 2.0 V, VIL max 0.8 V at VCC 4.5 to 5.5 V)."
      },
      {
        "number": "10",
        "name": "3B",
        "type": "input",
        "description": "Data input B of 2-input AND gate 3; accepts 0 to 5.5 V and is TTL-compatible (VIH min 2.0 V, VIL max 0.8 V at VCC 4.5 to 5.5 V)."
      },
      {
        "number": "11",
        "name": "4Y",
        "type": "output",
        "description": "Output of 2-input AND gate 4 (Y = A AND B); absolute maximum DC output current is ±25 mA."
      },
      {
        "number": "12",
        "name": "4A",
        "type": "input",
        "description": "Data input A of 2-input AND gate 4; accepts 0 to 5.5 V and is TTL-compatible (VIH min 2.0 V, VIL max 0.8 V at VCC 4.5 to 5.5 V)."
      },
      {
        "number": "13",
        "name": "4B",
        "type": "input",
        "description": "Data input B of 2-input AND gate 4; accepts 0 to 5.5 V and is TTL-compatible (VIH min 2.0 V, VIL max 0.8 V at VCC 4.5 to 5.5 V)."
      },
      {
        "number": "14",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply; recommended operating range 4.5 to 5.5 V, absolute maximum 7.0 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The page 2 pin-assignment drawing is garbled in the extracted text, so pin numbers were not read dir; The datasheet covers the AF, AFN, AFT and AFK packages with one pin assignment and does not label th"
        ],
        "pages_sent": 10,
        "cost_usd": 0.0482,
        "at": "2026-10-18T22:52:25"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603330127296688128",
        "pages": 10,
        "sha256": "a6d2c1cf985b842f",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
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        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3ee5786aae56190997aa793ba3cfc003fd616782770e29719b4562f012982245",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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        "file": "74vhct08aft-etched.step",
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        "checked": "2026-10-18",
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  }
}