# 74VHCT08AFT

**TOSHIBA** · Logic Gates · TSSOP-14

74VHCT08AFT from TOSHIBA, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input A of 2-input AND gate 1; accepts 0 to 5.5 V and is TTL-compatible (VIH min 2.0 V, VIL max 0.8 V at VCC 4.5 to 5.5 V). |
| 2 | 1B | input | Data input B of 2-input AND gate 1; accepts 0 to 5.5 V and is TTL-compatible (VIH min 2.0 V, VIL max 0.8 V at VCC 4.5 to 5.5 V). |
| 3 | 1Y | output | Output of 2-input AND gate 1 (Y = A AND B); absolute maximum DC output current is ±25 mA. |
| 4 | 2A | input | Data input A of 2-input AND gate 2; accepts 0 to 5.5 V and is TTL-compatible (VIH min 2.0 V, VIL max 0.8 V at VCC 4.5 to 5.5 V). |
| 5 | 2B | input | Data input B of 2-input AND gate 2; accepts 0 to 5.5 V and is TTL-compatible (VIH min 2.0 V, VIL max 0.8 V at VCC 4.5 to 5.5 V). |
| 6 | 2Y | output | Output of 2-input AND gate 2 (Y = A AND B); absolute maximum DC output current is ±25 mA. |
| 7 | GND | power_in | Ground reference (0 V) for the device. |
| 8 | 3Y | output | Output of 2-input AND gate 3 (Y = A AND B); absolute maximum DC output current is ±25 mA. |
| 9 | 3A | input | Data input A of 2-input AND gate 3; accepts 0 to 5.5 V and is TTL-compatible (VIH min 2.0 V, VIL max 0.8 V at VCC 4.5 to 5.5 V). |
| 10 | 3B | input | Data input B of 2-input AND gate 3; accepts 0 to 5.5 V and is TTL-compatible (VIH min 2.0 V, VIL max 0.8 V at VCC 4.5 to 5.5 V). |
| 11 | 4Y | output | Output of 2-input AND gate 4 (Y = A AND B); absolute maximum DC output current is ±25 mA. |
| 12 | 4A | input | Data input A of 2-input AND gate 4; accepts 0 to 5.5 V and is TTL-compatible (VIH min 2.0 V, VIL max 0.8 V at VCC 4.5 to 5.5 V). |
| 13 | 4B | input | Data input B of 2-input AND gate 4; accepts 0 to 5.5 V and is TTL-compatible (VIH min 2.0 V, VIL max 0.8 V at VCC 4.5 to 5.5 V). |
| 14 | VCC | power_in | Positive supply; recommended operating range 4.5 to 5.5 V, absolute maximum 7.0 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | TOSHIBA |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range | VCC | -0.5 |  | 7 | V |  | 2 |
| DC input voltage | VIN | -0.5 |  | 7 | V |  | 2 |
| DC output voltage | VOUT | -0.5 |  | 7 | V | VCC = 0 V (Note 2) | 2 |
| DC output voltage | VOUT | -0.5 |  |  | V | High or low state (Note 3); maximum printed as VCC + 0.5 | 2 |
| Input diode current | IIK | -20 |  |  | mA |  | 2 |
| Output diode current | IOK | -20 |  | 20 | mA | VOUT < GND, VOUT > VCC (Note 4) | 2 |
| DC output current | IOUT | -25 |  | 25 | mA |  | 2 |
| DC VCC/ground current | ICC | -50 |  | 50 | mA |  | 2 |
| Power dissipation | PD |  |  | 180 | mW |  | 2 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 2 |
| Supply voltage | VCC | 4.5 |  | 5.5 | V |  | 3 |
| Input voltage | VIN | 0 |  | 5.5 | V |  | 3 |
| Output voltage | VOUT | 0 |  | 5.5 | V | VCC = 0 V (Note 2) | 3 |
| Output voltage | VOUT | 0 |  |  | V | High or low state (Note 3); maximum printed as VCC | 3 |
| Operating temperature | Topr | -40 |  | 85 | °C |  | 3 |
| Input rise and fall time | dt/dV | 0 |  | 20 | ns/V |  | 3 |
| High-level input voltage | VIH | 2 |  |  | V | VCC = 4.5 to 5.5 V; Ta = 25°C | 3 |
| Low-level input voltage | VIL |  |  | 0.8 | V | VCC = 4.5 to 5.5 V; Ta = 25°C | 3 |
| High-level output voltage | VOH | 4.4 | 4.5 |  | V | IOH = -50 μA; VIN = VIH or VIL; VCC = 4.5 V; Ta = 25°C | 3 |
| High-level output voltage | VOH | 4.4 |  |  | V | IOH = -50 μA; VIN = VIH or VIL; VCC = 4.5 V; Ta = -40 to 85°C | 3 |
| High-level output voltage | VOH | 3.94 |  |  | V | IOH = -8 mA; VIN = VIH or VIL; VCC = 4.5 V; Ta = 25°C | 3 |
| High-level output voltage | VOH | 3.8 |  |  | V | IOH = -8 mA; VIN = VIH or VIL; VCC = 4.5 V; Ta = -40 to 85°C | 3 |
| Low-level output voltage | VOL |  | 0 | 0.1 | V | IOL = 50 μA; VIN = VIH or VIL; VCC = 4.5 V; Ta = 25°C | 3 |
| Low-level output voltage | VOL |  |  | 0.1 | V | IOL = 50 μA; VIN = VIH or VIL; VCC = 4.5 V; Ta = -40 to 85°C | 3 |
| Low-level output voltage | VOL |  |  | 0.36 | V | IOL = 8 mA; VIN = VIH or VIL; VCC = 4.5 V; Ta = 25°C | 3 |
| Low-level output voltage | VOL |  |  | 0.44 | V | IOL = 8 mA; VIN = VIH or VIL; VCC = 4.5 V; Ta = -40 to 85°C | 3 |
| Input leakage current | IIN | -0.1 |  | 0.1 | μA | VIN = 5.5 V or GND; VCC = 0 to 5.5 V; Ta = 25°C | 3 |
| Input leakage current | IIN | -1 |  | 1 | μA | VIN = 5.5 V or GND; VCC = 0 to 5.5 V; Ta = -40 to 85°C | 3 |
| Quiescent supply current | ICC |  |  | 2 | μA | VIN = VCC or GND; VCC = 5.5 V; Ta = 25°C | 3 |
| Quiescent supply current | ICC |  |  | 20 | μA | VIN = VCC or GND; VCC = 5.5 V; Ta = -40 to 85°C | 3 |
| Quiescent supply current | ICCT |  |  | 1.35 | mA | Per input: VIN = 3.4 V; other input VCC or GND; VCC = 5.5 V; Ta = 25°C | 3 |
| Quiescent supply current | ICCT |  |  | 1.5 | mA | Per input: VIN = 3.4 V; other input VCC or GND; VCC = 5.5 V; Ta = -40 to 85°C | 3 |
| Output leakage current | IOPD |  |  | 0.5 | μA | VOUT = 5.5 V; VCC = 0 V; Ta = 25°C | 3 |
| Output leakage current | IOPD |  |  | 5 | μA | VOUT = 5.5 V; VCC = 0 V; Ta = -40 to 85°C | 3 |
| Propagation delay time | tpLH, tpHL |  | 5 | 6.9 | ns | VCC = 5.0 ± 0.5 V; CL = 15 pF; tr = tf = 3 ns; Ta = 25°C | 4 |
| Propagation delay time | tpLH, tpHL | 1 |  | 8 | ns | VCC = 5.0 ± 0.5 V; CL = 15 pF; tr = tf = 3 ns; Ta = -40 to 85°C | 4 |
| Propagation delay time | tpLH, tpHL |  | 5.5 | 7.9 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; tr = tf = 3 ns; Ta = 25°C | 4 |
| Propagation delay time | tpLH, tpHL | 1 |  | 9 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; tr = tf = 3 ns; Ta = -40 to 85°C | 4 |
| Input capacitance | CIN |  | 4 | 10 | pF | Ta = 25°C | 4 |
| Input capacitance | CIN |  |  | 10 | pF | Ta = -40 to 85°C | 4 |
| Power dissipation capacitance | CPD |  | 18 |  | pF | Calculated from operating current consumption without load (Note) | 4 |
| Quiet output maximum dynamic VOL | VOLP |  | 0.4 | 0.8 | V | CL = 50 pF; VCC = 5.0 V; tr = tf = 3 ns; Ta = 25°C | 4 |
| Quiet output minimum dynamic VOL | VOLV |  | -0.4 | -0.8 | V | CL = 50 pF; VCC = 5.0 V; tr = tf = 3 ns; Ta = 25°C | 4 |
| Minimum high level dynamic input voltage | VIHD |  |  | 2 | V | CL = 50 pF; VCC = 5.0 V; Ta = 25°C | 4 |
| Maximum low level dynamic input voltage | VILD |  |  | 0.8 | V | CL = 50 pF; VCC = 5.0 V; Ta = 25°C | 4 |

## CAD (KiCad official)

- Symbol: `74VHCT08AFT`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `74vhct08aft-etched.step` / `74vhct08aft-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74vhct08aft.step` / `74vhct08aft.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [TOSHIBA datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603330127296688128) (10 pp, sha256 `a6d2c1cf985b842f`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/74vhct08aft-datasheet.pdf)