component
74VHC4040FT
Public Made by Adomby adom
TOSHIBA Counters / Dividers, TSSOP16B. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74VHC4040FT
TOSHIBA · Counters / Dividers · TSSOP16B
74VHC4040FT from TOSHIBA, in a TSSOP16B. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q12 | output | Counter stage 12 output (divide-by-4096 of CK). CMOS push-pull output, VOH >= VCC - 0.1 V at IOH = -50 uA; drives +/-8 mA at VCC = 4.5 V. |
| 2 | Q6 | output | Counter stage 6 output (divide-by-64 of CK). CMOS push-pull output driving up to +/-8 mA at VCC = 4.5 V. |
| 3 | Q5 | output | Counter stage 5 output (divide-by-32 of CK). CMOS push-pull output. |
| 4 | Q7 | output | Counter stage 7 output (divide-by-128 of CK). CMOS push-pull output. |
| 5 | Q4 | output | Counter stage 4 output (divide-by-16 of CK). CMOS push-pull output. |
| 6 | Q3 | output | Counter stage 3 output (divide-by-8 of CK). CMOS push-pull output. |
| 7 | Q2 | output | Counter stage 2 output (divide-by-4 of CK). CMOS push-pull output. |
| 8 | GND | power_in | Ground reference (0 V). Connect to system ground. |
| 9 | Q1 | output | Counter stage 1 output (divide-by-2 of CK). CMOS push-pull output. |
| 10 | CK | input | Clock input (active-low edge, negative-going transition advances the counter by one). CMOS-compatible input over 0 to 5.5 V with power-down protection. |
| 11 | CLR | input | Asynchronous master reset input. When held high, all Q outputs are forced low; must be low for the counter to advance on CK edges. |
| 12 | Q9 | output | Counter stage 9 output (divide-by-512 of CK). CMOS push-pull output. |
| 13 | Q8 | output | Counter stage 8 output (divide-by-256 of CK). CMOS push-pull output. |
| 14 | Q10 | output | Counter stage 10 output (divide-by-1024 of CK). CMOS push-pull output. |
| 15 | Q11 | output | Counter stage 11 output (divide-by-2048 of CK). CMOS push-pull output. |
| 16 | VCC | power_in | Positive supply voltage, 2.0 V to 5.5 V operating range (7.0 V absolute maximum). Bypass with a local ceramic capacitor to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TOSHIBA |
| Package | TSSOP16B |
| Category | Logic |
| Pins | 16 |
Ordering variants
74VHC4040FT
CAD (KiCad official)
- Symbol:
74VHC4040FT - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP16B (KiCad packages3D, STEP)
- 3D model files:
74vhc4040ft-etched.step/74vhc4040ft-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74vhc4040ft.step/74vhc4040ft.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TOSHIBA datasheet (10 pp, sha256
714d69a237bc4689, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).