component
74VHC32MTCX
Public Made by Adomby adom
onsemi Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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74VHC32MTCX
onsemi · Logic Gates · TSSOP-14
74VHC32MTCX from onsemi, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Gate 0 input A; unused inputs must be held HIGH or LOW, and 0V to 7V may be applied regardless of supply. |
| 2 | B0 | input | Gate 0 input B; unused inputs must be held HIGH or LOW, and 0V to 7V may be applied regardless of supply. |
| 3 | O0 | output | Gate 0 output, the OR of A0 and B0. |
| 4 | A1 | input | Gate 1 input A; unused inputs must be held HIGH or LOW, and 0V to 7V may be applied regardless of supply. |
| 5 | B1 | input | Gate 1 input B; unused inputs must be held HIGH or LOW, and 0V to 7V may be applied regardless of supply. |
| 6 | O1 | output | Gate 1 output, the OR of A1 and B1. |
| 7 | GND | power_in | Ground, 0V reference. |
| 8 | O3 | output | Gate 3 output, the OR of A3 and B3. |
| 9 | B3 | input | Gate 3 input B; unused inputs must be held HIGH or LOW, and 0V to 7V may be applied regardless of supply. |
| 10 | A3 | input | Gate 3 input A; unused inputs must be held HIGH or LOW, and 0V to 7V may be applied regardless of supply. |
| 11 | O2 | output | Gate 2 output, the OR of A2 and B2. |
| 12 | B2 | input | Gate 2 input B; unused inputs must be held HIGH or LOW, and 0V to 7V may be applied regardless of supply. |
| 13 | A2 | input | Gate 2 input A; unused inputs must be held HIGH or LOW, and 0V to 7V may be applied regardless of supply. |
| 14 | VCC | power_in | Supply voltage, recommended 2.0V to 5.5V (absolute maximum 7.0V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 2 | 5.5 | V | 2 | ||
| Input voltage | VIN | 0 | 5.5 | V | 2 | ||
| Output voltage | VOUT | 0 | V | upper limit is VCC | 2 | ||
| Operating temperature | TOPR | -40 | 85 | °C | 2 | ||
| Input rise and fall time | tr, tf | 0 | 100 | ns/V | VCC 3.3V ±0.3V | 2 | |
| Input rise and fall time | tr, tf | 0 | 20 | ns/V | VCC 5.0V ±0.5V | 2 | |
| Supply voltage | VCC | -0.5 | 7 | V | 2 | ||
| DC input voltage | VIN | -0.5 | 7 | V | 2 | ||
| DC output voltage | VOUT | -0.5 | V | upper limit VCC + 0.5 V | 2 | ||
| Input diode current | IIK | 20 | mA | 2 | |||
| Output diode current | IOK | -20 | 20 | mA | 2 | ||
| DC output current | IOUT | -25 | 25 | mA | 2 | ||
| DC VCC/GND current | ICC | -50 | 50 | mA | 2 | ||
| Storage temperature | TSTG | -65 | 150 | °C | 2 | ||
| Lead temperature | TL | 260 | °C | soldering, 10 seconds | 2 | ||
| HIGH level input voltage | VIH | 1.5 | V | TA 25°C; VCC 2.0V | 2 | ||
| LOW level input voltage | VIL | 0.5 | V | TA 25°C; VCC 2.0V | 2 | ||
| HIGH level output voltage | VOH | 1.9 | 2 | V | TA 25°C; VCC 2.0V; VIN VIH or VIL; IOH 50 µA | 2 | |
| HIGH level output voltage | VOH | 1.9 | V | TA -40 to 85°C; VCC 2.0V; VIN VIH or VIL; IOH 50 µA | 2 | ||
| HIGH level output voltage | VOH | 2.9 | 3 | V | TA 25°C; VCC 3.0V; VIN VIH or VIL; IOH 50 µA | 2 | |
| HIGH level output voltage | VOH | 2.9 | V | TA -40 to 85°C; VCC 3.0V; VIN VIH or VIL; IOH 50 µA | 2 | ||
| HIGH level output voltage | VOH | 4.4 | 4.5 | V | TA 25°C; VCC 4.5V; VIN VIH or VIL; IOH 50 µA | 2 | |
| HIGH level output voltage | VOH | 4.4 | V | TA -40 to 85°C; VCC 4.5V; VIN VIH or VIL; IOH 50 µA | 2 | ||
| HIGH level output voltage | VOH | 2.58 | V | TA 25°C; VCC 3.0V; IOH 4 mA | 2 | ||
| HIGH level output voltage | VOH | 2.48 | V | TA -40 to 85°C; VCC 3.0V; IOH 4 mA | 2 | ||
| HIGH level output voltage | VOH | 3.94 | V | TA 25°C; VCC 4.5V; IOH 8 mA | 2 | ||
| HIGH level output voltage | VOH | 3.8 | V | TA -40 to 85°C; VCC 4.5V; IOH 8 mA | 2 | ||
| LOW level output voltage | VOL | 0 | 0.1 | V | TA 25°C; VCC 2.0V; VIN VIH or VIL; IOL 50 µA | 2 | |
| LOW level output voltage | VOL | 0.1 | V | TA -40 to 85°C; VCC 2.0V; VIN VIH or VIL; IOL 50 µA | 2 | ||
| LOW level output voltage | VOL | 0.36 | V | TA 25°C; VCC 3.0V; IOL 4 mA | 2 | ||
| LOW level output voltage | VOL | 0.44 | V | TA -40 to 85°C; VCC 3.0V; IOL 4 mA | 2 | ||
| Input leakage current | IIN | -0.1 | 0.1 | µA | TA 25°C; VCC 0 to 5.5V; VIN 5.5V or GND | 2 | |
| Input leakage current | IIN | -1 | 1 | µA | TA -40 to 85°C; VCC 0 to 5.5V; VIN 5.5V or GND | 2 | |
| Quiescent supply current | ICC | 2 | µA | TA 25°C; VCC 5.5V; VIN VCC or GND | 2 | ||
| Quiescent supply current | ICC | 20 | µA | TA -40 to 85°C; VCC 5.5V; VIN VCC or GND | 2 | ||
| Quiet output maximum dynamic VOL | VOLP | 0.3 | 0.8 | V | TA 25°C; VCC 5.0V; CL 50 pF | 2 | |
| Quiet output minimum dynamic VOL | VOLV | 0.3 | 0.8 | V | TA 25°C; VCC 5.0V; CL 50 pF | 2 | |
| Minimum HIGH level dynamic input voltage | VIHD | 3.5 | V | TA 25°C; VCC 5.0V; CL 50 pF | 2 | ||
| Maximum LOW level dynamic input voltage | VILD | 1.5 | V | TA 25°C; VCC 5.0V; CL 50 pF | 2 | ||
| Propagation delay tPHL | tPHL | 5.5 | 7.9 | ns | TA 25°C; VCC 3.3V ±0.3V; CL 15 pF | 3 | |
| Propagation delay tPHL | tPHL | 1 | 9.5 | ns | TA -40 to 85°C; VCC 3.3V ±0.3V; CL 15 pF | 3 | |
| Propagation delay tPLH | tPLH | 8 | 11.4 | ns | TA 25°C; VCC 3.3V ±0.3V; CL 50 pF | 3 | |
| Propagation delay tPLH | tPLH | 1 | 13 | ns | TA -40 to 85°C; VCC 3.3V ±0.3V; CL 50 pF | 3 | |
| Propagation delay tPHL | tPHL | 3.8 | 5.5 | ns | TA 25°C; VCC 5.0V ±0.5V; CL 15 pF | 3 | |
| Propagation delay tPHL | tPHL | 1 | 6.5 | ns | TA -40 to 85°C; VCC 5.0V ±0.5V; CL 15 pF | 3 | |
| Propagation delay tPLH | tPLH | 5.3 | 7.5 | ns | TA 25°C; VCC 5.0V ±0.5V; CL 50 pF | 3 | |
| Propagation delay tPLH | tPLH | 1 | 8.5 | ns | TA -40 to 85°C; VCC 5.0V ±0.5V; CL 50 pF | 3 | |
| Input capacitance | CIN | 4 | 10 | pF | TA 25°C; VCC open | 3 | |
| Input capacitance | CIN | 10 | pF | TA -40 to 85°C; VCC open | 3 |
CAD (KiCad official)
- Symbol:
74VHC32MTCX - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
74vhc32mtcx-etched.step/74vhc32mtcx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74vhc32mtcx.step/74vhc32mtcx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (7 pp, sha256
94ffda007f014fe9, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).