component
74VHC164FT
Public Made by Adomby adom
TOSHIBA Shift Registers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
74VHC164FT
TOSHIBA · Shift Registers · TSSOP-14
74VHC164FT from TOSHIBA, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Serial data input A, ANDed with B so one may be used as a data enable; inputs accept 0 to 5.5 V regardless of supply. |
| 2 | B | input | Serial data input B, ANDed with A so one may be used as a data enable; inputs accept 0 to 5.5 V regardless of supply. |
| 3 | QA | output | Parallel data output A (first stage of the 8-bit shift register). |
| 4 | QB | output | Parallel data output B of the shift register. |
| 5 | QC | output | Parallel data output C of the shift register. |
| 6 | QD | output | Parallel data output D of the shift register. |
| 7 | GND | power_in | Ground pin (0 V). |
| 8 | CK | input | Clock input; data shifts on the positive edge of CK. |
| 9 | CLR | input | Active-low overriding clear input that resets the register outputs. |
| 10 | QE | output | Parallel data output E of the shift register. |
| 11 | QF | output | Parallel data output F of the shift register. |
| 12 | QG | output | Parallel data output G of the shift register. |
| 13 | QH | output | Parallel data output H (last stage of the shift register). |
| 14 | VCC | power_in | Supply voltage, operating range 2.0 to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TOSHIBA |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-level input voltage | VIH | 1.5 | V | Ta = 25 °C; VCC = 2.0 V | 5 | ||
| Low-level input voltage | VIL | 0.5 | V | Ta = 25 °C; VCC = 2.0 V | 5 | ||
| High-level output voltage | VOH | 1.9 | V | Ta = 25 °C; VIN = VIH or VIL; IOH = -50 µA; VCC = 2.0 V | 5 | ||
| High-level output voltage | VOH | 2.9 | V | Ta = 25 °C; VIN = VIH or VIL; IOH = -50 µA; VCC = 3.0 V | 5 | ||
| High-level output voltage | VOH | 4.4 | V | Ta = 25 °C; VIN = VIH or VIL; IOH = -50 µA; VCC = 4.5 V | 5 | ||
| High-level output voltage | VOH | 2.58 | V | Ta = 25 °C; VIN = VIH or VIL; IOH = -4 mA; VCC = 3.0 V | 5 | ||
| High-level output voltage | VOH | 3.94 | V | Ta = 25 °C; VIN = VIH or VIL; IOH = -8 mA; VCC = 4.5 V | 5 | ||
| Low-level output voltage | VOL | 0.1 | V | Ta = 25 °C; VIN = VIH or VIL; IOL = 50 µA; VCC = 2.0 V | 5 | ||
| Low-level output voltage | VOL | 0.36 | V | Ta = 25 °C; VIN = VIH or VIL; IOL = 4 mA; VCC = 3.0 V | 5 | ||
| Input leakage current | IIN | -0.1 | 0.1 | µA | Ta = 25 °C; VIN = 5.5 V or GND; VCC = 0 to 5.5 V | 5 | |
| Quiescent supply current | ICC | 4 | µA | Ta = 25 °C; VIN = VCC or GND; VCC = 5.5 V | 5 | ||
| High-level input voltage | VIH | 1.5 | V | Ta = -40 to 125 °C; VCC = 2.0 V | 6 | ||
| Low-level input voltage | VIL | 0.5 | V | Ta = -40 to 125 °C; VCC = 2.0 V | 6 | ||
| High-level output voltage | VOH | 1.9 | V | Ta = -40 to 125 °C; VIN = VIH or VIL; IOH = -50 µA; VCC = 2.0 V | 6 | ||
| High-level output voltage | VOH | 2.9 | V | Ta = -40 to 125 °C; VIN = VIH or VIL; IOH = -50 µA; VCC = 3.0 V | 6 | ||
| High-level output voltage | VOH | 4.4 | V | Ta = -40 to 125 °C; VIN = VIH or VIL; IOH = -50 µA; VCC = 4.5 V | 6 | ||
| High-level output voltage | VOH | 2.4 | V | Ta = -40 to 125 °C; VIN = VIH or VIL; IOH = -4 mA; VCC = 3.0 V | 6 | ||
| High-level output voltage | VOH | 3.7 | V | Ta = -40 to 125 °C; VIN = VIH or VIL; IOH = -8 mA; VCC = 4.5 V | 6 | ||
| Low-level output voltage | VOL | 0.1 | V | Ta = -40 to 125 °C; VIN = VIH or VIL; IOL = 50 µA; VCC = 2.0 V | 6 | ||
| Low-level output voltage | VOL | 0.55 | V | Ta = -40 to 125 °C; VIN = VIH or VIL; IOL = 4 mA; VCC = 3.0 V | 6 | ||
| Input leakage current | IIN | -2 | 2 | µA | Ta = -40 to 125 °C; VIN = 5.5 V or GND; VCC = 0 to 5.5 V | 6 | |
| Quiescent supply current | ICC | 80 | µA | Ta = -40 to 125 °C; VIN = VCC or GND; VCC = 5.5 V | 6 | ||
| Supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| Input voltage | VIN | -0.5 | 7 | V | 4 | ||
| Input diode current | IIK | -20 | mA | 4 | |||
| Output diode current | IOK | -20 | 20 | mA | 4 | ||
| Output current | IOUT | -25 | 25 | mA | 4 | ||
| VCC/ground current | ICC | -75 | 75 | mA | 4 | ||
| Power dissipation | PD | 180 | mW | Ta = -40 to 85 °C; derate -3.25 mW/°C from Ta = 85 to 125 °C until 50 mW | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Supply voltage | VCC | 2 | 5.5 | V | 4 | ||
| Input voltage | VIN | 0 | 5.5 | V | 4 | ||
| Operating temperature | Topr | -40 | 125 | °C | 4 | ||
| Input rise and fall times | dt/dv | 0 | 100 | ns/V | VCC = 3.3 ±0.3 V | 4 | |
| Input rise and fall times | dt/dv | 0 | 20 | ns/V | VCC = 5 ±0.5 V | 4 | |
| Minimum pulse width (CK) | tw(L),tw(H) | 5 | ns | Ta = -40 to 125 °C; VCC = 3.3 ±0.3 V; tr = tf = 3 ns | 7 | ||
| Minimum pulse width (CLR) | tw(L) | 5 | ns | Ta = -40 to 125 °C; VCC = 3.3 ±0.3 V; tr = tf = 3 ns | 7 | ||
| Minimum setup time | tSth | 6 | ns | Ta = -40 to 125 °C; VCC = 3.3 ±0.3 V; tr = tf = 3 ns | 7 | ||
| Minimum setup time | tSth | 4.5 | ns | Ta = -40 to 125 °C; VCC = 5.0 ±0.5 V; tr = tf = 3 ns | 7 | ||
| Minimum hold time | tSth | 0 | ns | Ta = -40 to 125 °C; VCC = 3.3 ±0.3 V; tr = tf = 3 ns | 7 | ||
| Minimum hold time | tSth | 1 | ns | Ta = -40 to 125 °C; VCC = 5.0 ±0.5 V; tr = tf = 3 ns | 7 | ||
| Minimum removal time (CLR) | trem | 3.5 | ns | Ta = -40 to 125 °C; VCC = 3.3 ±0.3 V; tr = tf = 3 ns | 7 | ||
| Minimum removal time (CLR) | trem | 3 | ns | Ta = -40 to 125 °C; VCC = 5.0 ±0.5 V; tr = tf = 3 ns | 7 | ||
| Propagation delay time (CK-Q) | tPLH,tPHL | 1 | 17 | ns | Ta = -40 to 125 °C; VCC = 3.3 ±0.3 V; CL = 15 pF | 8 | |
| Propagation delay time (CK-Q) | tPLH,tPHL | 1 | 20.5 | ns | Ta = -40 to 125 °C; VCC = 3.3 ±0.3 V; CL = 50 pF | 8 | |
| Propagation delay time (CK-Q) | tPLH,tPHL | 1 | 12 | ns | Ta = -40 to 125 °C; VCC = 5.0 ±0.5 V; CL = 15 pF | 8 | |
| Propagation delay time (CK-Q) | tPLH,tPHL | 1 | 14 | ns | Ta = -40 to 125 °C; VCC = 5.0 ±0.5 V; CL = 50 pF | 8 | |
| Maximum clock frequency | fMAX | 60 | MHz | Ta = -40 to 125 °C; VCC = 3.3 ±0.3 V; CL = 15 pF | 8 | ||
| Maximum clock frequency | fMAX | 40 | MHz | Ta = -40 to 125 °C; VCC = 3.3 ±0.3 V; CL = 50 pF | 8 | ||
| Maximum clock frequency | fMAX | 100 | MHz | Ta = -40 to 125 °C; VCC = 5.0 ±0.5 V; CL = 15 pF | 8 | ||
| Maximum clock frequency | fMAX | 65 | MHz | Ta = -40 to 125 °C; VCC = 5.0 ±0.5 V; CL = 50 pF | 8 | ||
| Input capacitance | CIN | 10 | pF | Ta = -40 to 125 °C | 8 |
CAD (KiCad official)
- Symbol:
74VHC164FT - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
74vhc164ft-etched.step/74vhc164ft-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74vhc164ft.step/74vhc164ft.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TOSHIBA datasheet (10 pp, sha256
f1e157b3a6a5f18b, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74VHC164FT
**TOSHIBA** · Shift Registers · TSSOP-14
74VHC164FT from TOSHIBA, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Serial data input A, ANDed with B so one may be used as a data enable; inputs accept 0 to 5.5 V regardless of supply. |
| 2 | B | input | Serial data input B, ANDed with A so one may be used as a data enable; inputs accept 0 to 5.5 V regardless of supply. |
| 3 | QA | output | Parallel data output A (first stage of the 8-bit shift register). |
| 4 | QB | output | Parallel data output B of the shift register. |
| 5 | QC | output | Parallel data output C of the shift register. |
| 6 | QD | output | Parallel data output D of the shift register. |
| 7 | GND | power_in | Ground pin (0 V). |
| 8 | CK | input | Clock input; data shifts on the positive edge of CK. |
| 9 | CLR | input | Active-low overriding clear input that resets the register outputs. |
| 10 | QE | output | Parallel data output E of the shift register. |
| 11 | QF | output | Parallel data output F of the shift register. |
| 12 | QG | output | Parallel data output G of the shift register. |
| 13 | QH | output | Parallel data output H (last stage of the shift register). |
| 14 | VCC | power_in | Supply voltage, operating range 2.0 to 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TOSHIBA |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-level input voltage | VIH | 1.5 | | | V | Ta = 25 °C; VCC = 2.0 V | 5 |
| Low-level input voltage | VIL | | | 0.5 | V | Ta = 25 °C; VCC = 2.0 V | 5 |
| High-level output voltage | VOH | 1.9 | | | V | Ta = 25 °C; VIN = VIH or VIL; IOH = -50 µA; VCC = 2.0 V | 5 |
| High-level output voltage | VOH | 2.9 | | | V | Ta = 25 °C; VIN = VIH or VIL; IOH = -50 µA; VCC = 3.0 V | 5 |
| High-level output voltage | VOH | 4.4 | | | V | Ta = 25 °C; VIN = VIH or VIL; IOH = -50 µA; VCC = 4.5 V | 5 |
| High-level output voltage | VOH | 2.58 | | | V | Ta = 25 °C; VIN = VIH or VIL; IOH = -4 mA; VCC = 3.0 V | 5 |
| High-level output voltage | VOH | 3.94 | | | V | Ta = 25 °C; VIN = VIH or VIL; IOH = -8 mA; VCC = 4.5 V | 5 |
| Low-level output voltage | VOL | | | 0.1 | V | Ta = 25 °C; VIN = VIH or VIL; IOL = 50 µA; VCC = 2.0 V | 5 |
| Low-level output voltage | VOL | | | 0.36 | V | Ta = 25 °C; VIN = VIH or VIL; IOL = 4 mA; VCC = 3.0 V | 5 |
| Input leakage current | IIN | -0.1 | | 0.1 | µA | Ta = 25 °C; VIN = 5.5 V or GND; VCC = 0 to 5.5 V | 5 |
| Quiescent supply current | ICC | | | 4 | µA | Ta = 25 °C; VIN = VCC or GND; VCC = 5.5 V | 5 |
| High-level input voltage | VIH | 1.5 | | | V | Ta = -40 to 125 °C; VCC = 2.0 V | 6 |
| Low-level input voltage | VIL | | | 0.5 | V | Ta = -40 to 125 °C; VCC = 2.0 V | 6 |
| High-level output voltage | VOH | 1.9 | | | V | Ta = -40 to 125 °C; VIN = VIH or VIL; IOH = -50 µA; VCC = 2.0 V | 6 |
| High-level output voltage | VOH | 2.9 | | | V | Ta = -40 to 125 °C; VIN = VIH or VIL; IOH = -50 µA; VCC = 3.0 V | 6 |
| High-level output voltage | VOH | 4.4 | | | V | Ta = -40 to 125 °C; VIN = VIH or VIL; IOH = -50 µA; VCC = 4.5 V | 6 |
| High-level output voltage | VOH | 2.4 | | | V | Ta = -40 to 125 °C; VIN = VIH or VIL; IOH = -4 mA; VCC = 3.0 V | 6 |
| High-level output voltage | VOH | 3.7 | | | V | Ta = -40 to 125 °C; VIN = VIH or VIL; IOH = -8 mA; VCC = 4.5 V | 6 |
| Low-level output voltage | VOL | | | 0.1 | V | Ta = -40 to 125 °C; VIN = VIH or VIL; IOL = 50 µA; VCC = 2.0 V | 6 |
| Low-level output voltage | VOL | | | 0.55 | V | Ta = -40 to 125 °C; VIN = VIH or VIL; IOL = 4 mA; VCC = 3.0 V | 6 |
| Input leakage current | IIN | -2 | | 2 | µA | Ta = -40 to 125 °C; VIN = 5.5 V or GND; VCC = 0 to 5.5 V | 6 |
| Quiescent supply current | ICC | | | 80 | µA | Ta = -40 to 125 °C; VIN = VCC or GND; VCC = 5.5 V | 6 |
| Supply voltage | VCC | -0.5 | | 7 | V | | 4 |
| Input voltage | VIN | -0.5 | | 7 | V | | 4 |
| Input diode current | IIK | -20 | | | mA | | 4 |
| Output diode current | IOK | -20 | | 20 | mA | | 4 |
| Output current | IOUT | -25 | | 25 | mA | | 4 |
| VCC/ground current | ICC | -75 | | 75 | mA | | 4 |
| Power dissipation | PD | | | 180 | mW | Ta = -40 to 85 °C; derate -3.25 mW/°C from Ta = 85 to 125 °C until 50 mW | 4 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| Supply voltage | VCC | 2 | | 5.5 | V | | 4 |
| Input voltage | VIN | 0 | | 5.5 | V | | 4 |
| Operating temperature | Topr | -40 | | 125 | °C | | 4 |
| Input rise and fall times | dt/dv | 0 | | 100 | ns/V | VCC = 3.3 ±0.3 V | 4 |
| Input rise and fall times | dt/dv | 0 | | 20 | ns/V | VCC = 5 ±0.5 V | 4 |
| Minimum pulse width (CK) | tw(L),tw(H) | 5 | | | ns | Ta = -40 to 125 °C; VCC = 3.3 ±0.3 V; tr = tf = 3 ns | 7 |
| Minimum pulse width (CLR) | tw(L) | 5 | | | ns | Ta = -40 to 125 °C; VCC = 3.3 ±0.3 V; tr = tf = 3 ns | 7 |
| Minimum setup time | tSth | 6 | | | ns | Ta = -40 to 125 °C; VCC = 3.3 ±0.3 V; tr = tf = 3 ns | 7 |
| Minimum setup time | tSth | 4.5 | | | ns | Ta = -40 to 125 °C; VCC = 5.0 ±0.5 V; tr = tf = 3 ns | 7 |
| Minimum hold time | tSth | 0 | | | ns | Ta = -40 to 125 °C; VCC = 3.3 ±0.3 V; tr = tf = 3 ns | 7 |
| Minimum hold time | tSth | 1 | | | ns | Ta = -40 to 125 °C; VCC = 5.0 ±0.5 V; tr = tf = 3 ns | 7 |
| Minimum removal time (CLR) | trem | 3.5 | | | ns | Ta = -40 to 125 °C; VCC = 3.3 ±0.3 V; tr = tf = 3 ns | 7 |
| Minimum removal time (CLR) | trem | 3 | | | ns | Ta = -40 to 125 °C; VCC = 5.0 ±0.5 V; tr = tf = 3 ns | 7 |
| Propagation delay time (CK-Q) | tPLH,tPHL | 1 | | 17 | ns | Ta = -40 to 125 °C; VCC = 3.3 ±0.3 V; CL = 15 pF | 8 |
| Propagation delay time (CK-Q) | tPLH,tPHL | 1 | | 20.5 | ns | Ta = -40 to 125 °C; VCC = 3.3 ±0.3 V; CL = 50 pF | 8 |
| Propagation delay time (CK-Q) | tPLH,tPHL | 1 | | 12 | ns | Ta = -40 to 125 °C; VCC = 5.0 ±0.5 V; CL = 15 pF | 8 |
| Propagation delay time (CK-Q) | tPLH,tPHL | 1 | | 14 | ns | Ta = -40 to 125 °C; VCC = 5.0 ±0.5 V; CL = 50 pF | 8 |
| Maximum clock frequency | fMAX | 60 | | | MHz | Ta = -40 to 125 °C; VCC = 3.3 ±0.3 V; CL = 15 pF | 8 |
| Maximum clock frequency | fMAX | 40 | | | MHz | Ta = -40 to 125 °C; VCC = 3.3 ±0.3 V; CL = 50 pF | 8 |
| Maximum clock frequency | fMAX | 100 | | | MHz | Ta = -40 to 125 °C; VCC = 5.0 ±0.5 V; CL = 15 pF | 8 |
| Maximum clock frequency | fMAX | 65 | | | MHz | Ta = -40 to 125 °C; VCC = 5.0 ±0.5 V; CL = 50 pF | 8 |
| Input capacitance | CIN | | | 10 | pF | Ta = -40 to 125 °C | 8 |
## CAD (KiCad official)
- Symbol: `74VHC164FT`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `74vhc164ft-etched.step` / `74vhc164ft-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74vhc164ft.step` / `74vhc164ft.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [TOSHIBA datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603180860204204032) (10 pp, sha256 `f1e157b3a6a5f18b`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74vhc164ft-datasheet.pdf)