component
74VHC125PW
Public Made by Adomby adom
Nexperia Buffers, Drivers, Receivers, Transceivers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 5d ago |
| viewers | 5d ago |
| 74vhc125pw-etched.glb | 5d ago |
| 74vhc125pw-etched.step | 5d ago |
| 74vhc125pw-hero.glb | 5d ago |
| 74vhc125pw-hero.overlay.json | 5d ago |
| 74vhc125pw.glb | 5d ago |
| 74vhc125pw.kicad_mod | 5d ago |
| 74vhc125pw.kicad_sym | 5d ago |
| 74vhc125pw.lbr | 5d ago |
| 74vhc125pw.step | 5d ago |
| package.json | 5d ago |
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| README.md | 5d ago |
74VHC125PW
Nexperia · Buffers, Drivers, Receivers, Transceivers · TSSOP-14
74VHC125PW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable input for buffer 1, active LOW; a HIGH level puts output 1Y into the high-impedance OFF-state. |
| 2 | 1A | input | Data input of buffer 1; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 3 | 1Y | tri_state | Data output of buffer 1 (non-inverting 3-state output), high-impedance when 1OE is HIGH. |
| 4 | 2OE | input | Output enable input for buffer 2, active LOW; a HIGH level puts output 2Y into the high-impedance OFF-state. |
| 5 | 2A | input | Data input of buffer 2; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 6 | 2Y | tri_state | Data output of buffer 2 (non-inverting 3-state output), high-impedance when 2OE is HIGH. |
| 7 | GND | power_in | Ground (0 V) reference for all voltages. |
| 8 | 3Y | tri_state | Data output of buffer 3 (non-inverting 3-state output), high-impedance when 3OE is HIGH. |
| 9 | 3A | input | Data input of buffer 3; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 10 | 3OE | input | Output enable input for buffer 3, active LOW; a HIGH level puts output 3Y into the high-impedance OFF-state. |
| 11 | 4Y | tri_state | Data output of buffer 4 (non-inverting 3-state output), high-impedance when 4OE is HIGH. |
| 12 | 4A | input | Data input of buffer 4; all inputs have Schmitt-trigger action and accept voltages higher than VCC. |
| 13 | 4OE | input | Output enable input for buffer 4, active LOW; a HIGH level puts output 4Y into the high-impedance OFF-state. |
| 14 | VCC | power_in | Supply voltage; recommended range is 2.0 V to 5.5 V for 74VHC125 and 4.5 V to 5.5 V for 74VHCT125. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC supply voltage | VCC | 2 | 5 | 5.5 | V | 3 | |
| input voltage | VI | 0 | 5.5 | V | 3 | ||
| output voltage | VO | 0 | V | Printed maximum is VCC | 3 | ||
| ambient temperature | Tamb | -40 | 25 | 125 | °C | 3 | |
| input transition rise and fall rate | Δt/ΔV | 100 | ns/V | VCC = 3.3 V ± 0.3 V | 3 | ||
| input transition rise and fall rate | Δt/ΔV | 20 | ns/V | VCC = 5.0 V ± 0.5 V | 3 | ||
| supply voltage | VCC | -0.5 | 7 | V | 3 | ||
| input voltage | VI | -0.5 | 7 | V | 3 | ||
| input clamping current | IIK | -20 | mA | VI < -0.5 V | 3 | ||
| output clamping current | IOK | -20 | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 3 | |
| output current | IO | -25 | 25 | mA | VO = -0.5 V to (VCC + 0.5 V) | 3 | |
| supply current | ICC | 75 | mA | 3 | |||
| ground current | IGND | -75 | mA | 3 | |||
| storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| total power dissipation | Ptot | 500 | mW | Tamb = -40 °C to +125 °C | 3 | ||
| HIGH-level input voltage | VIH | 1.5 | V | -40 °C to +125 °C; VCC = 2.0 V | 4 | ||
| HIGH-level input voltage | VIH | 2.1 | V | -40 °C to +125 °C; VCC = 3.0 V | 4 | ||
| HIGH-level input voltage | VIH | 3.85 | V | -40 °C to +125 °C; VCC = 5.5 V | 4 | ||
| LOW-level input voltage | VIL | 0.5 | V | -40 °C to +125 °C; VCC = 2.0 V | 4 | ||
| LOW-level input voltage | VIL | 0.9 | V | -40 °C to +125 °C; VCC = 3.0 V | 4 | ||
| LOW-level input voltage | VIL | 1.65 | V | -40 °C to +125 °C; VCC = 5.5 V | 4 | ||
| HIGH-level output voltage | VOH | 1.9 | V | -40 °C to +125 °C; VI = VIH or VIL; IO = -50 μA; VCC = 2.0 V | 4 | ||
| HIGH-level output voltage | VOH | 2.9 | V | -40 °C to +125 °C; VI = VIH or VIL; IO = -50 μA; VCC = 3.0 V | 4 | ||
| HIGH-level output voltage | VOH | 4.4 | V | -40 °C to +125 °C; VI = VIH or VIL; IO = -50 μA; VCC = 4.5 V | 4 | ||
| HIGH-level output voltage | VOH | 2.4 | V | -40 °C to +125 °C; VI = VIH or VIL; IO = -4.0 mA; VCC = 3.0 V | 4 | ||
| HIGH-level output voltage | VOH | 3.7 | V | -40 °C to +125 °C; VI = VIH or VIL; IO = -8.0 mA; VCC = 4.5 V | 4 | ||
| LOW-level output voltage | VOL | 0.1 | V | -40 °C to +125 °C; VI = VIH or VIL; IO = 50 μA; VCC = 2.0 V | 4 | ||
| LOW-level output voltage | VOL | 0.55 | V | -40 °C to +125 °C; VI = VIH or VIL; IO = 4.0 mA; VCC = 3.0 V | 4 | ||
| OFF-state output current | IOZ | -10 | 10 | μA | -40 °C to +125 °C; VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V | 4 | |
| input leakage current | II | 2 | μA | -40 °C to +125 °C; VI = 5.5 V or GND; VCC = 0 V to 5.5 V | 4 | ||
| supply current | ICC | 40 | μA | -40 °C to +125 °C; VI = VCC or GND; IO = 0 A; VCC = 5.5 V | 4 | ||
| input capacitance | CI | 10 | pF | -40 °C to +125 °C | 4 | ||
| propagation delay nA to nY | tpd | 1 | 11.5 | ns | -40 °C to +125 °C; VCC = 3.0 V to 3.6 V; CL = 15 pF | 5 | |
| propagation delay nA to nY | tpd | 1 | 14.5 | ns | -40 °C to +125 °C; VCC = 3.0 V to 3.6 V; CL = 50 pF | 5 | |
| propagation delay nA to nY | tpd | 1 | 7 | ns | -40 °C to +125 °C; VCC = 4.5 V to 5.5 V; CL = 15 pF | 5 | |
| propagation delay nA to nY | tpd | 1 | 9.5 | ns | -40 °C to +125 °C; VCC = 4.5 V to 5.5 V; CL = 50 pF | 5 | |
| enable time nOE to nY | ten | 1 | 11.5 | ns | -40 °C to +125 °C; VCC = 3.0 V to 3.6 V; CL = 15 pF | 5 | |
| enable time nOE to nY | ten | 1 | 14.5 | ns | -40 °C to +125 °C; VCC = 3.0 V to 3.6 V; CL = 50 pF | 5 | |
| enable time nOE to nY | ten | 1 | 6.5 | ns | -40 °C to +125 °C; VCC = 4.5 V to 5.5 V; CL = 15 pF | 5 | |
| enable time nOE to nY | ten | 1 | 9 | ns | -40 °C to +125 °C; VCC = 4.5 V to 5.5 V; CL = 50 pF | 5 | |
| disable time nOE to nY | tdis | 1 | 12.5 | ns | -40 °C to +125 °C; VCC = 3.0 V to 3.6 V; CL = 15 pF | 5 | |
| disable time nOE to nY | tdis | 1 | 16.5 | ns | -40 °C to +125 °C; VCC = 3.0 V to 3.6 V; CL = 50 pF | 5 | |
| disable time nOE to nY | tdis | 1 | 8.5 | ns | -40 °C to +125 °C; VCC = 4.5 V to 5.5 V; CL = 15 pF | 5 | |
| disable time nOE to nY | tdis | 1 | 11 | ns | -40 °C to +125 °C; VCC = 4.5 V to 5.5 V; CL = 50 pF | 5 |
CAD (KiCad official)
- Symbol:
74VHC125PW - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
74vhc125pw-etched.step/74vhc125pw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74vhc125pw.step/74vhc125pw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (14 pp, sha256
1916966c42a73890, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).