component
74LVX14MTCX
Public Made by Adomby adom
onsemi Inverters, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74LVX14MTCX
onsemi · Inverters · TSSOP-14
74LVX14MTCX from onsemi, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I0 | input | Schmitt trigger input of inverter 0, tolerant of input voltages up to 7V (recommended 0V to 5.5V); unused inputs must be held HIGH or LOW. |
| 2 | O0 | output | Inverted output of gate 0, swinging between 0V and VCC and sourcing or sinking up to ±25mA absolute maximum. |
| 3 | I1 | input | Schmitt trigger input of inverter 1, tolerant of input voltages up to 7V (recommended 0V to 5.5V); unused inputs must be held HIGH or LOW. |
| 4 | O1 | output | Inverted output of gate 1, swinging between 0V and VCC and sourcing or sinking up to ±25mA absolute maximum. |
| 5 | I2 | input | Schmitt trigger input of inverter 2, tolerant of input voltages up to 7V (recommended 0V to 5.5V); unused inputs must be held HIGH or LOW. |
| 6 | O2 | output | Inverted output of gate 2, swinging between 0V and VCC and sourcing or sinking up to ±25mA absolute maximum. |
| 7 | GND | power_in | Ground pin; DC ground current is limited to ±50mA absolute maximum. |
| 8 | O3 | output | Inverted output of gate 3, swinging between 0V and VCC and sourcing or sinking up to ±25mA absolute maximum. |
| 9 | I3 | input | Schmitt trigger input of inverter 3, tolerant of input voltages up to 7V (recommended 0V to 5.5V); unused inputs must be held HIGH or LOW. |
| 10 | O4 | output | Inverted output of gate 4, swinging between 0V and VCC and sourcing or sinking up to ±25mA absolute maximum. |
| 11 | I4 | input | Schmitt trigger input of inverter 4, tolerant of input voltages up to 7V (recommended 0V to 5.5V); unused inputs must be held HIGH or LOW. |
| 12 | O5 | output | Inverted output of gate 5, swinging between 0V and VCC and sourcing or sinking up to ±25mA absolute maximum. |
| 13 | I5 | input | Schmitt trigger input of inverter 5, tolerant of input voltages up to 7V (recommended 0V to 5.5V); unused inputs must be held HIGH or LOW. |
| 14 | VCC | power_in | Positive supply pin, recommended operating range 2.0V to 3.6V (absolute maximum -0.5V to +7.0V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 2 | 3.6 | V | 4 | ||
| Input Voltage | VI | 0 | 5.5 | V | 4 | ||
| Output Voltage | VO | 0 | V | 0V to VCC | 4 | ||
| Operating Temperature | TA | -40 | 85 | °C | 4 | ||
| Supply Voltage | VCC | -0.5 | 7 | V | 4 | ||
| DC Input Voltage | VI | -0.5 | 7 | V | 4 | ||
| DC Input Diode Current | IIK | -20 | mA | VI = -0.5V | 4 | ||
| DC Output Diode Current | IOK | -20 | mA | VO = -0.5V | 4 | ||
| DC Output Diode Current | IOK | 20 | mA | VO = VCC + 0.5V | 4 | ||
| DC Output Voltage | VO | -0.5 | V | -0.5V to VCC + 0.5V | 4 | ||
| DC Output Source or Sink Current | IO | -25 | 25 | mA | 4 | ||
| DC VCC or Ground Current | ICC or IGND | -50 | 50 | mA | 4 | ||
| Storage Temperature | TSTG | -65 | 150 | °C | 4 | ||
| Power Dissipation | P | 180 | mW | 4 | |||
| HIGH Level Output Voltage | VOH | 1.9 | 2 | V | VCC 2.0V, VIN = VIL or VIH, IOH = -50µA, TA = +25°C | 5 | |
| HIGH Level Output Voltage | VOH | 1.9 | V | VCC 2.0V, VIN = VIL or VIH, IOH = -50µA, TA = -40°C to +85°C | 5 | ||
| HIGH Level Output Voltage | VOH | 2.9 | 3 | V | VCC 3.0V, VIN = VIL or VIH, IOH = -50µA, TA = +25°C | 5 | |
| HIGH Level Output Voltage | VOH | 2.9 | V | VCC 3.0V, VIN = VIL or VIH, IOH = -50µA, TA = -40°C to +85°C | 5 | ||
| HIGH Level Output Voltage | VOH | 2.58 | V | VIN = VIL or VIH, IOH = -4mA, TA = +25°C | 5 | ||
| HIGH Level Output Voltage | VOH | 2.48 | V | VIN = VIL or VIH, IOH = -4mA, TA = -40°C to +85°C | 5 | ||
| LOW Level Output Voltage | VOL | 0 | 0.1 | V | VCC 2.0V, VIN = VIL or VIH, IOL = 50µA, TA = +25°C | 5 | |
| LOW Level Output Voltage | VOL | 0.1 | V | VCC 2.0V, VIN = VIL or VIH, IOL = 50µA, TA = -40°C to +85°C | 5 | ||
| LOW Level Output Voltage | VOL | 0.36 | V | VIN = VIL or VIH, IOL = 4mA, TA = +25°C | 5 | ||
| LOW Level Output Voltage | VOL | 0.44 | V | VIN = VIL or VIH, IOL = 4mA, TA = -40°C to +85°C | 5 | ||
| Hysteresis | VH | 0.3 | 1.2 | V | VCC 3.0V, TA = +25°C | 5 | |
| Hysteresis | VH | 0.3 | 1.2 | V | VCC 3.0V, TA = -40°C to +85°C | 5 | |
| Input Leakage Current | IIN | -1 | 0.1 | 1 | µA | VCC 3.6V, VIN = 5.5V or GND | 5 |
| Quiescent Supply Current | ICC | 2 | 20 | µA | VCC 3.6V, VIN = VCC or GND | 5 | |
| Quiet Output Maximum Dynamic VOL | VOLP | 0.3 | 0.5 | V | VCC 3.3V, CL 50pF, TA = 25°C | 5 | |
| Quiet Output Minimum Dynamic VOL | VOLV | -0.5 | -0.3 | V | VCC 3.3V, CL 50pF, TA = 25°C | 5 | |
| Minimum HIGH Level Dynamic Input Voltage | VIHD | 2 | V | VCC 3.3V, CL 50pF, TA = 25°C | 5 | ||
| Maximum LOW Level Dynamic Input Voltage | VILD | 0.8 | V | VCC 3.3V, CL 50pF, TA = 25°C | 5 | ||
| Propagation Delay Time | tPLH, tPHL | 8.7 | 16.3 | ns | VCC 2.7V, CL 15pF, TA = +25°C | 6 | |
| Propagation Delay Time | tPLH, tPHL | 1 | 19.5 | ns | VCC 2.7V, CL 15pF, TA = -40°C to +85°C | 6 | |
| Propagation Delay Time | tPLH, tPHL | 11.2 | 19.8 | ns | VCC 2.7V, CL 50pF, TA = +25°C | 6 | |
| Propagation Delay Time | tPLH, tPHL | 1 | 23 | ns | VCC 2.7V, CL 50pF, TA = -40°C to +85°C | 6 | |
| Propagation Delay Time | tPLH, tPHL | 6.8 | 10.6 | ns | VCC 3.3V ± 0.3V, CL 15pF, TA = +25°C | 6 | |
| Propagation Delay Time | tPLH, tPHL | 1 | 12.5 | ns | VCC 3.3V ± 0.3V, CL 15pF, TA = -40°C to +85°C | 6 | |
| Propagation Delay Time | tPLH, tPHL | 9.3 | 14.1 | ns | VCC 3.3V ± 0.3V, CL 50pF, TA = +25°C | 6 | |
| Propagation Delay Time | tPLH, tPHL | 1 | 16 | ns | VCC 3.3V ± 0.3V, CL 50pF, TA = -40°C to +85°C | 6 | |
| Output to Output Skew | tOSLH, tOSHL | 1.5 | ns | VCC 2.7V, CL 50pF, TA = +25°C | 6 | ||
| Input Capacitance | CIN | 4 | 10 | pF | 6 | ||
| Power Dissipation Capacitance | CPD | 21 | pF | per gate | 6 |
CAD (KiCad official)
- Symbol:
74LVX14MTCX - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
74lvx14mtcx-etched.step/74lvx14mtcx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lvx14mtcx.step/74lvx14mtcx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (9 pp, sha256
241f722c4ef7f19e, retrieved 2026-10-17, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).