component
74LVX08MTCX
Public Made by Adomby adom
onsemi Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
74LVX08MTCX
onsemi · Gates · TSSOP-14
74LVX08MTCX from onsemi, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Input A of gate 0; tolerates voltages up to 7 V (recommended 0 V to 5.5 V) and must not be left floating. |
| 2 | B0 | input | Input B of gate 0; tolerates voltages up to 7 V (recommended 0 V to 5.5 V) and must not be left floating. |
| 3 | O0 | output | Output of gate 0, the AND of A0 and B0. |
| 4 | A1 | input | Input A of gate 1; tolerates voltages up to 7 V (recommended 0 V to 5.5 V) and must not be left floating. |
| 5 | B1 | input | Input B of gate 1; tolerates voltages up to 7 V (recommended 0 V to 5.5 V) and must not be left floating. |
| 6 | O1 | output | Output of gate 1, the AND of A1 and B1. |
| 7 | GND | power_in | Ground pin. |
| 8 | O3 | output | Output of gate 3, the AND of A3 and B3. |
| 9 | B3 | input | Input B of gate 3; tolerates voltages up to 7 V (recommended 0 V to 5.5 V) and must not be left floating. |
| 10 | A3 | input | Input A of gate 3; tolerates voltages up to 7 V (recommended 0 V to 5.5 V) and must not be left floating. |
| 11 | O2 | output | Output of gate 2, the AND of A2 and B2. |
| 12 | B2 | input | Input B of gate 2; tolerates voltages up to 7 V (recommended 0 V to 5.5 V) and must not be left floating. |
| 13 | A2 | input | Input A of gate 2; tolerates voltages up to 7 V (recommended 0 V to 5.5 V) and must not be left floating. |
| 14 | VCC | power_in | Positive supply pin, recommended 2.0 V to 3.6 V (absolute maximum -0.5 V to 7.0 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 2 | 3.6 | V | 3 | ||
| Input Voltage | VI | 0 | 5.5 | V | 3 | ||
| Output Voltage | VO | 0 | V | Upper limit printed as VCC | 3 | ||
| Operating Temperature | TA | -40 | 85 | °C | 3 | ||
| Input Rise and Fall Time | Δt / ΔV | 0 | 100 | ns/V | 3 | ||
| Supply Voltage | VCC | -0.5 | 7 | V | 3 | ||
| DC Input Diode Current | IIK | -20 | mA | VI = -0.5 V | 3 | ||
| DC Input Voltage | VI | -0.5 | 7 | V | 3 | ||
| DC Output Diode Current | IOK | -20 | mA | VO = -0.5 V | 3 | ||
| DC Output Diode Current | IOK | 20 | mA | VO = VCC + 0.5 V | 3 | ||
| DC Output Voltage | VO | -0.5 | V | Upper limit printed as VCC + 0.5 V | 3 | ||
| DC Output Source or Sink Current | IO | -25 | 25 | mA | 3 | ||
| DC VCC or Ground Current | ICC or IGND | -50 | 50 | mA | 3 | ||
| Storage Temperature | TSTG | -65 | 150 | °C | 3 | ||
| Power Dissipation | P | 180 | mW | 3 | |||
| Lead Temperature (Soldering) | TL | 240 | °C | 10 seconds | 3 | ||
| HIGH Level Input Voltage | VIH | 1.5 | V | VCC = 2.0 V, TA = 25°C | 4 | ||
| HIGH Level Input Voltage | VIH | 2 | V | VCC = 3.0 V, TA = 25°C | 4 | ||
| HIGH Level Input Voltage | VIH | 2.4 | V | VCC = 3.6 V, TA = 25°C | 4 | ||
| LOW Level Input Voltage | VIL | 0.5 | V | VCC = 2.0 V, TA = 25°C | 4 | ||
| LOW Level Input Voltage | VIL | 0.8 | V | VCC = 3.0 V, TA = 25°C | 4 | ||
| HIGH Level Output Voltage | VOH | 1.9 | 2 | V | VCC = 2.0 V, VIN = VIL or VIH, IOH = -50 μA, TA = 25°C | 4 | |
| HIGH Level Output Voltage | VOH | 1.9 | V | VCC = 2.0 V, VIN = VIL or VIH, IOH = -50 μA, TA = -40°C to +85°C | 4 | ||
| HIGH Level Output Voltage | VOH | 2.9 | 3 | V | VCC = 3.0 V, VIN = VIL or VIH, IOH = -50 μA, TA = 25°C | 4 | |
| HIGH Level Output Voltage | VOH | 2.9 | V | VCC = 3.0 V, VIN = VIL or VIH, IOH = -50 μA, TA = -40°C to +85°C | 4 | ||
| HIGH Level Output Voltage | VOH | 2.58 | V | VIN = VIL or VIH, IOH = -4 mA, TA = 25°C (VCC not printed in text) | 4 | ||
| HIGH Level Output Voltage | VOH | 2.48 | V | VIN = VIL or VIH, IOH = -4 mA, TA = -40°C to +85°C (VCC not printed in text) | 4 | ||
| LOW Level Output Voltage | VOL | 0 | 0.1 | V | VCC = 2.0 V, VIN = VIL or VIH, IOL = 50 μA, TA = 25°C | 4 | |
| LOW Level Output Voltage | VOL | 0.1 | V | VCC = 2.0 V, VIN = VIL or VIH, IOL = 50 μA, TA = -40°C to +85°C | 4 | ||
| LOW Level Output Voltage | VOL | 0.36 | V | VIN = VIL or VIH, IOL = 4 mA, TA = 25°C (VCC not printed in text) | 4 | ||
| LOW Level Output Voltage | VOL | 0.44 | V | VIN = VIL or VIH, IOL = 4 mA, TA = -40°C to +85°C (VCC not printed in text) | 4 | ||
| Input Leakage Current | IIN | -0.1 | 0.1 | μA | VCC = 3.6 V, VIN = 5.5 V or GND, TA = 25°C | 4 | |
| Input Leakage Current | IIN | -1 | 1 | μA | VCC = 3.6 V, VIN = 5.5 V or GND, TA = -40°C to +85°C | 4 | |
| Quiescent Supply Current | ICC | 2 | μA | VCC = 3.6 V, VIN = VCC or GND, TA = 25°C | 4 | ||
| Quiescent Supply Current | ICC | 20 | μA | VCC = 3.6 V, VIN = VCC or GND, TA = -40°C to +85°C | 4 | ||
| Quiet Output Maximum Dynamic VOL | VOLP | 0.3 | 0.5 | V | VCC = 3.3 V, CL = 50 pF, TA = 25°C | 4 | |
| Quiet Output Minimum Dynamic VOL | VOLV | -0.5 | -0.3 | V | VCC = 3.3 V, CL = 50 pF, TA = 25°C | 4 | |
| Minimum HIGH Level Dynamic Input Voltage | VIHD | 2 | V | VCC = 3.3 V, CL = 50 pF, TA = 25°C | 4 | ||
| Maximum LOW Level Dynamic Input Voltage | VILD | 0.8 | V | VCC = 3.3 V, CL = 50 pF, TA = 25°C | 4 | ||
| Propagation Delay Time | tPLH, tPHL | 6.3 | 11.4 | ns | VCC = 2.7 V, CL = 15 pF, TA = 25°C | 5 | |
| Propagation Delay Time | tPLH, tPHL | 1 | 13.5 | ns | VCC = 2.7 V, CL = 15 pF, TA = -40°C to +85°C | 5 | |
| Propagation Delay Time | tPLH, tPHL | 8.8 | 14.9 | ns | VCC = 2.7 V, CL = 50 pF, TA = 25°C | 5 | |
| Propagation Delay Time | tPLH, tPHL | 1 | 17 | ns | VCC = 2.7 V, CL = 50 pF, TA = -40°C to +85°C | 5 | |
| Propagation Delay Time | tPLH, tPHL | 4.8 | 7.1 | ns | VCC = 3.3 ± 0.3 V, CL = 15 pF, TA = 25°C | 5 | |
| Propagation Delay Time | tPLH, tPHL | 1 | 8.5 | ns | VCC = 3.3 ± 0.3 V, CL = 15 pF, TA = -40°C to +85°C | 5 | |
| Propagation Delay Time | tPLH, tPHL | 7.3 | 10.6 | ns | VCC = 3.3 ± 0.3 V, CL = 50 pF, TA = 25°C | 5 | |
| Propagation Delay Time | tPLH, tPHL | 1 | 12 | ns | VCC = 3.3 ± 0.3 V, CL = 50 pF, TA = -40°C to +85°C | 5 | |
| Output to Output Skew | tOSLH, tOSHL | 1.5 | ns | VCC = 2.7 V, CL = 50 pF, TA = 25°C | 5 | ||
| Input Capacitance | CIN | 4 | 10 | pF | TA = 25°C | 5 |
CAD (KiCad official)
- Symbol:
74LVX08MTCX - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
74lvx08mtcx-etched.step/74lvx08mtcx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lvx08mtcx.step/74lvx08mtcx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (8 pp, sha256
f01e85a818351dff, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74LVX08MTCX
**onsemi** · Gates · TSSOP-14
74LVX08MTCX from onsemi, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Input A of gate 0; tolerates voltages up to 7 V (recommended 0 V to 5.5 V) and must not be left floating. |
| 2 | B0 | input | Input B of gate 0; tolerates voltages up to 7 V (recommended 0 V to 5.5 V) and must not be left floating. |
| 3 | O0 | output | Output of gate 0, the AND of A0 and B0. |
| 4 | A1 | input | Input A of gate 1; tolerates voltages up to 7 V (recommended 0 V to 5.5 V) and must not be left floating. |
| 5 | B1 | input | Input B of gate 1; tolerates voltages up to 7 V (recommended 0 V to 5.5 V) and must not be left floating. |
| 6 | O1 | output | Output of gate 1, the AND of A1 and B1. |
| 7 | GND | power_in | Ground pin. |
| 8 | O3 | output | Output of gate 3, the AND of A3 and B3. |
| 9 | B3 | input | Input B of gate 3; tolerates voltages up to 7 V (recommended 0 V to 5.5 V) and must not be left floating. |
| 10 | A3 | input | Input A of gate 3; tolerates voltages up to 7 V (recommended 0 V to 5.5 V) and must not be left floating. |
| 11 | O2 | output | Output of gate 2, the AND of A2 and B2. |
| 12 | B2 | input | Input B of gate 2; tolerates voltages up to 7 V (recommended 0 V to 5.5 V) and must not be left floating. |
| 13 | A2 | input | Input A of gate 2; tolerates voltages up to 7 V (recommended 0 V to 5.5 V) and must not be left floating. |
| 14 | VCC | power_in | Positive supply pin, recommended 2.0 V to 3.6 V (absolute maximum -0.5 V to 7.0 V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-14 |
| Category | Logic ICs |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 2 | | 3.6 | V | | 3 |
| Input Voltage | VI | 0 | | 5.5 | V | | 3 |
| Output Voltage | VO | 0 | | | V | Upper limit printed as VCC | 3 |
| Operating Temperature | TA | -40 | | 85 | °C | | 3 |
| Input Rise and Fall Time | Δt / ΔV | 0 | | 100 | ns/V | | 3 |
| Supply Voltage | VCC | -0.5 | | 7 | V | | 3 |
| DC Input Diode Current | IIK | -20 | | | mA | VI = -0.5 V | 3 |
| DC Input Voltage | VI | -0.5 | | 7 | V | | 3 |
| DC Output Diode Current | IOK | -20 | | | mA | VO = -0.5 V | 3 |
| DC Output Diode Current | IOK | | | 20 | mA | VO = VCC + 0.5 V | 3 |
| DC Output Voltage | VO | -0.5 | | | V | Upper limit printed as VCC + 0.5 V | 3 |
| DC Output Source or Sink Current | IO | -25 | | 25 | mA | | 3 |
| DC VCC or Ground Current | ICC or IGND | -50 | | 50 | mA | | 3 |
| Storage Temperature | TSTG | -65 | | 150 | °C | | 3 |
| Power Dissipation | P | | | 180 | mW | | 3 |
| Lead Temperature (Soldering) | TL | | | 240 | °C | 10 seconds | 3 |
| HIGH Level Input Voltage | VIH | 1.5 | | | V | VCC = 2.0 V, TA = 25°C | 4 |
| HIGH Level Input Voltage | VIH | 2 | | | V | VCC = 3.0 V, TA = 25°C | 4 |
| HIGH Level Input Voltage | VIH | 2.4 | | | V | VCC = 3.6 V, TA = 25°C | 4 |
| LOW Level Input Voltage | VIL | | | 0.5 | V | VCC = 2.0 V, TA = 25°C | 4 |
| LOW Level Input Voltage | VIL | | | 0.8 | V | VCC = 3.0 V, TA = 25°C | 4 |
| HIGH Level Output Voltage | VOH | 1.9 | 2 | | V | VCC = 2.0 V, VIN = VIL or VIH, IOH = -50 μA, TA = 25°C | 4 |
| HIGH Level Output Voltage | VOH | 1.9 | | | V | VCC = 2.0 V, VIN = VIL or VIH, IOH = -50 μA, TA = -40°C to +85°C | 4 |
| HIGH Level Output Voltage | VOH | 2.9 | 3 | | V | VCC = 3.0 V, VIN = VIL or VIH, IOH = -50 μA, TA = 25°C | 4 |
| HIGH Level Output Voltage | VOH | 2.9 | | | V | VCC = 3.0 V, VIN = VIL or VIH, IOH = -50 μA, TA = -40°C to +85°C | 4 |
| HIGH Level Output Voltage | VOH | 2.58 | | | V | VIN = VIL or VIH, IOH = -4 mA, TA = 25°C (VCC not printed in text) | 4 |
| HIGH Level Output Voltage | VOH | 2.48 | | | V | VIN = VIL or VIH, IOH = -4 mA, TA = -40°C to +85°C (VCC not printed in text) | 4 |
| LOW Level Output Voltage | VOL | | 0 | 0.1 | V | VCC = 2.0 V, VIN = VIL or VIH, IOL = 50 μA, TA = 25°C | 4 |
| LOW Level Output Voltage | VOL | | | 0.1 | V | VCC = 2.0 V, VIN = VIL or VIH, IOL = 50 μA, TA = -40°C to +85°C | 4 |
| LOW Level Output Voltage | VOL | | | 0.36 | V | VIN = VIL or VIH, IOL = 4 mA, TA = 25°C (VCC not printed in text) | 4 |
| LOW Level Output Voltage | VOL | | | 0.44 | V | VIN = VIL or VIH, IOL = 4 mA, TA = -40°C to +85°C (VCC not printed in text) | 4 |
| Input Leakage Current | IIN | -0.1 | | 0.1 | μA | VCC = 3.6 V, VIN = 5.5 V or GND, TA = 25°C | 4 |
| Input Leakage Current | IIN | -1 | | 1 | μA | VCC = 3.6 V, VIN = 5.5 V or GND, TA = -40°C to +85°C | 4 |
| Quiescent Supply Current | ICC | | | 2 | μA | VCC = 3.6 V, VIN = VCC or GND, TA = 25°C | 4 |
| Quiescent Supply Current | ICC | | | 20 | μA | VCC = 3.6 V, VIN = VCC or GND, TA = -40°C to +85°C | 4 |
| Quiet Output Maximum Dynamic VOL | VOLP | | 0.3 | 0.5 | V | VCC = 3.3 V, CL = 50 pF, TA = 25°C | 4 |
| Quiet Output Minimum Dynamic VOL | VOLV | -0.5 | -0.3 | | V | VCC = 3.3 V, CL = 50 pF, TA = 25°C | 4 |
| Minimum HIGH Level Dynamic Input Voltage | VIHD | 2 | | | V | VCC = 3.3 V, CL = 50 pF, TA = 25°C | 4 |
| Maximum LOW Level Dynamic Input Voltage | VILD | | | 0.8 | V | VCC = 3.3 V, CL = 50 pF, TA = 25°C | 4 |
| Propagation Delay Time | tPLH, tPHL | | 6.3 | 11.4 | ns | VCC = 2.7 V, CL = 15 pF, TA = 25°C | 5 |
| Propagation Delay Time | tPLH, tPHL | 1 | | 13.5 | ns | VCC = 2.7 V, CL = 15 pF, TA = -40°C to +85°C | 5 |
| Propagation Delay Time | tPLH, tPHL | | 8.8 | 14.9 | ns | VCC = 2.7 V, CL = 50 pF, TA = 25°C | 5 |
| Propagation Delay Time | tPLH, tPHL | 1 | | 17 | ns | VCC = 2.7 V, CL = 50 pF, TA = -40°C to +85°C | 5 |
| Propagation Delay Time | tPLH, tPHL | | 4.8 | 7.1 | ns | VCC = 3.3 ± 0.3 V, CL = 15 pF, TA = 25°C | 5 |
| Propagation Delay Time | tPLH, tPHL | 1 | | 8.5 | ns | VCC = 3.3 ± 0.3 V, CL = 15 pF, TA = -40°C to +85°C | 5 |
| Propagation Delay Time | tPLH, tPHL | | 7.3 | 10.6 | ns | VCC = 3.3 ± 0.3 V, CL = 50 pF, TA = 25°C | 5 |
| Propagation Delay Time | tPLH, tPHL | 1 | | 12 | ns | VCC = 3.3 ± 0.3 V, CL = 50 pF, TA = -40°C to +85°C | 5 |
| Output to Output Skew | tOSLH, tOSHL | | | 1.5 | ns | VCC = 2.7 V, CL = 50 pF, TA = 25°C | 5 |
| Input Capacitance | CIN | | 4 | 10 | pF | TA = 25°C | 5 |
## CAD (KiCad official)
- Symbol: `74LVX08MTCX`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `74lvx08mtcx-etched.step` / `74lvx08mtcx-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74lvx08mtcx.step` / `74lvx08mtcx.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/74lvx08mtcx-d.pdf) (8 pp, sha256 `f01e85a818351dff`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74lvx08mtcx-datasheet.pdf)