component

74LVT245D

Public Made by Adom

by adom

Nexperia Buffers, Drivers, Receivers, Transceivers, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic74lvt245dfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
74lvt245d / README.md
History Download
Ray Publish 0.1.0 48441ea 6d ago

74LVT245D

Nexperia · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil

74LVT245D from Nexperia, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DIR input Direction control input that sets the transfer direction (LOW: B to A, HIGH: A to B when OE is LOW).
2 A0 bidirectional Data input/output A0 with bus hold, 3-state, inputs tolerant to 5.5 V.
3 A1 bidirectional Data input/output A1 with bus hold, 3-state, inputs tolerant to 5.5 V.
4 A2 bidirectional Data input/output A2 with bus hold, 3-state, inputs tolerant to 5.5 V.
5 A3 bidirectional Data input/output A3 with bus hold, 3-state, inputs tolerant to 5.5 V.
6 A4 bidirectional Data input/output A4 with bus hold, 3-state, inputs tolerant to 5.5 V.
7 A5 bidirectional Data input/output A5 with bus hold, 3-state, inputs tolerant to 5.5 V.
8 A6 bidirectional Data input/output A6 with bus hold, 3-state, inputs tolerant to 5.5 V.
9 A7 bidirectional Data input/output A7 with bus hold, 3-state, inputs tolerant to 5.5 V.
10 GND power_in Ground (0 V).
11 B7 bidirectional Data input/output B7 with bus hold, 3-state, inputs tolerant to 5.5 V.
12 B6 bidirectional Data input/output B6 with bus hold, 3-state, inputs tolerant to 5.5 V.
13 B5 bidirectional Data input/output B5 with bus hold, 3-state, inputs tolerant to 5.5 V.
14 B4 bidirectional Data input/output B4 with bus hold, 3-state, inputs tolerant to 5.5 V.
15 B3 bidirectional Data input/output B3 with bus hold, 3-state, inputs tolerant to 5.5 V.
16 B2 bidirectional Data input/output B2 with bus hold, 3-state, inputs tolerant to 5.5 V.
17 B1 bidirectional Data input/output B1 with bus hold, 3-state, inputs tolerant to 5.5 V.
18 B0 bidirectional Data input/output B0 with bus hold, 3-state, inputs tolerant to 5.5 V.
19 OE input Output enable input, active LOW; a HIGH puts the outputs in the high-impedance OFF-state.
20 VCC power_in Supply voltage, 2.7 V to 3.6 V recommended operating range.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOIC-20-300mil
Category Logic
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 4.6 V 4
Input voltage VI -0.5 7 V 4
Output voltage VO -0.5 7 V output in OFF or HIGH state 4
Input clamping current IIK -50 mA VI < 0 V 4
Output clamping current IOK -50 mA VO < 0 V 4
Output current LOW state IO 128 mA output in LOW state 4
Output current HIGH state IO -64 mA output in HIGH state 4
Storage temperature Tstg -65 150 °C 4
Junction temperature Tj 150 °C 4
Total power dissipation Ptot 500 mW Tamb = -40 °C to +85 °C 4
Supply voltage VCC 2.7 3.6 V 4
Input voltage VI 0 5.5 V 4
HIGH-level output current IOH -32 mA 4
LOW-level output current IOL 32 mA 4
LOW-level output current IOL 64 mA current duty cycle ≤ 50 %; fi ≥ 1 kHz 4
Ambient temperature Tamb -40 85 °C in free air 4
Input transition rise and fall rate Δt/ΔV 10 ns/V output enabled 4
Input clamping voltage VIK -1.2 -0.9 V VCC = 2.7 V; IIK = -18 mA 5
HIGH-level input voltage VIH 2 V 5
LOW-level input voltage VIL 0.8 V 5
HIGH-level output voltage VOH -0.2 -0.1 V VCC = 2.7 V to 3.6 V; IOH = -100 μA (printed VCC - 0.2 / VCC - 0.1) 5
HIGH-level output voltage VOH 2.4 2.5 V VCC = 2.7 V; IOH = -8 mA 5
HIGH-level output voltage VOH 2 2.2 V VCC = 3.0 V; IOH = -32 mA 5
LOW-level output voltage VOL 0.1 0.2 V VCC = 2.7 V; IOL = 100 μA 5
LOW-level output voltage VOL 0.3 0.5 V VCC = 2.7 V; IOL = 24 mA 5
LOW-level output voltage VOL 0.25 0.4 V VCC = 3.0 V; IOL = 16 mA 5
LOW-level output voltage VOL 0.4 0.55 V VCC = 3.0 V; IOL = 64 mA 5
Input leakage current, control pins II 1 10 μA control pins; VCC = 0 V or 3.6 V; VI = 5.5 V 5
Input leakage current, control pins II -1 0.1 1 μA control pins; VCC = 3.6 V; VI = VCC or GND (typ ±0.1) 5
Input leakage current, I/O data pins II 1 20 μA I/O data pins; VCC = 3.6 V; VI = 5.5 V 5
Input leakage current, I/O data pins II 0.1 1 μA I/O data pins; VCC = 3.6 V; VI = VCC 5
Input leakage current, I/O data pins II -5 -1 μA I/O data pins; VCC = 3.6 V; VI = 0 V 5
Power-off leakage current IOFF -100 1 100 μA VCC = 0 V; VI or VO = 0 V to 4.5 V 5
Output leakage current ILO 60 125 μA VO = 5.5 V; VCC = 3.6 V; output HIGH 5
Power-up/power-down output current IO(pu/pd) -100 15 100 μA VCC ≤ 1.2 V; VO = 0.5 V to VCC; VI = GND or VCC; OE = don’t care; Tamb = 25 °C only 5
Bus hold LOW current IBHL 75 150 μA VCC = 3.0 V; VI = 0.8 V 5
Bus hold HIGH current IBHH -150 -75 μA VCC = 3.0 V; VI = 2.0 V 5
Bus hold LOW overdrive current IBHLO 500 μA VCC = 0 V to 3.0 V; VI = 3.6 V 5
Bus hold HIGH overdrive current IBHHO -500 μA VCC = 0 V to 3.0 V; VI = 3.6 V 5
Supply current, outputs HIGH ICC 0.13 0.19 mA VCC = 3.6 V; VI = VCC or GND; IO = 0 A; outputs HIGH 5
Supply current, outputs LOW ICC 3 12 mA VCC = 3.6 V; VI = VCC or GND; IO = 0 A; outputs LOW 5
Supply current, outputs disabled ICC 0.13 0.19 mA VCC = 3.6 V; VI = VCC or GND; IO = 0 A; outputs disabled 5
Additional supply current per input pin ΔICC 0.1 0.2 mA VCC = 3.0 V to 3.6 V; one input = VCC - 0.6 V; other inputs at VCC or GND 5
Input capacitance CI 4 pF DIR and OE inputs; outputs disabled; VI = 0 V or 3.0 V 5
Input/output capacitance CI/O 10 pF at input/output data pins, outputs disabled; VI/O = 0 V or 3.0 V 6
LOW to HIGH propagation delay tPLH 4.7 ns An to Bn or Bn to An; VCC = 2.7 V 6
LOW to HIGH propagation delay tPLH 1 2.4 4 ns An to Bn or Bn to An; VCC = 3.3 V ± 0.3 V 6
HIGH to LOW propagation delay tPHL 4.6 ns An to Bn or Bn to An; VCC = 2.7 V 6
HIGH to LOW propagation delay tPHL 1 2.4 4 ns An to Bn or Bn to An; VCC = 3.3 V ± 0.3 V 6
OFF-state to HIGH propagation delay tPZH 7.1 ns VCC = 2.7 V 6
OFF-state to HIGH propagation delay tPZH 1.1 3.3 5.5 ns VCC = 3.3 V ± 0.3 V 6
OFF-state to LOW propagation delay tPZL 6.5 ns VCC = 2.7 V 6
OFF-state to LOW propagation delay tPZL 1.1 3.3 5.5 ns VCC = 3.3 V ± 0.3 V 6
HIGH to OFF-state propagation delay tPHZ 6.5 ns VCC = 2.7 V 6
HIGH to OFF-state propagation delay tPHZ 2.2 3.6 5.9 ns VCC = 3.3 V ± 0.3 V 6
LOW to OFF-state propagation delay tPLZ 4.8 ns VCC = 2.7 V 6
LOW to OFF-state propagation delay tPLZ 2 3.4 4.8 ns VCC = 3.3 V ± 0.3 V 6

CAD (KiCad official)

  • Symbol: 74LVT245D
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: 74lvt245d-etched.step / 74lvt245d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lvt245d.step / 74lvt245d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (14 pp, sha256 ca0715786e446e61, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF