component

74LVT125PW

Public Made by Adom

by adom

Nexperia Buffers / Drivers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic ics74lvt125pwfactory-2.0.0extractor-text

Verified 74LVT125PW

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 14 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: 74LVT125PW · TSSOP-14 · 14 pins
  • ✓copper: 14 copper pads, none touching another net
  • ✓datasheet: all 14 pin names found in the 14-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: TSSOP-14_4.4x5mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-yjignwp5/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.10)
  • ✓pads: 14 pins = 14 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 14 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ 74lvt125pw.kicad_sym✓ 74lvt125pw.kicad_mod✓ 74lvt125pw.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 18h ago
viewers 74lvt125pw: viewers · Ray 18h ago
74lvt125pw-etched.glb Publish 0.1.0 · Ray 18h ago
74lvt125pw-etched.step 74lvt125pw: factory component page (tier=mfr) · Ray 18h ago
74lvt125pw-hero.glb 74lvt125pw: hero GLB from the etched model (keeps the MPN mark) · Ray 18h ago
74lvt125pw-hero.overlay.json Publish 0.1.0 · Ray 18h ago
74lvt125pw.glb Publish 0.1.0 · Ray 18h ago
74lvt125pw.kicad_mod Publish 0.1.0 · Ray 18h ago
74lvt125pw.kicad_sym Publish 0.1.0 · Ray 18h ago
74lvt125pw.lbr Publish 0.1.0 · Ray 18h ago
74lvt125pw.step Publish 0.1.0 · Ray 18h ago
package.json Publish 0.1.0 · Ray 18h ago
page.json Set visibility: public · Ray 18h ago
README.md Publish 0.1.0 · Ray 18h ago
verification.json Verified: Published by the parts factory: tier mfr, 14 pins · Ray 18h ago

74LVT125PW

Nexperia · Buffers / Drivers · TSSOP-14

74LVT125PW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Output enable input (active LOW); a HIGH on this pin puts outputs 1Y in the high-impedance OFF-state.
2 1A input Data input with bus hold, so no external pull-up resistor is needed to hold it, and it is overvoltage tolerant to 5.5 V.
3 1Y output Data output of the 3-state buffer, rated for +64 mA and -32 mA output capability.
4 2OE input Output enable input (active LOW); a HIGH on this pin puts outputs 2Y in the high-impedance OFF-state.
5 2A input Data input with bus hold, so no external pull-up resistor is needed to hold it, and it is overvoltage tolerant to 5.5 V.
6 2Y output Data output of the 3-state buffer, rated for +64 mA and -32 mA output capability.
7 GND power_in Ground (0 V) reference for all voltages.
8 3Y output Data output of the 3-state buffer, rated for +64 mA and -32 mA output capability.
9 3A input Data input with bus hold, so no external pull-up resistor is needed to hold it, and it is overvoltage tolerant to 5.5 V.
10 3OE input Output enable input (active LOW); a HIGH on this pin puts outputs 3Y in the high-impedance OFF-state.
11 4Y output Data output of the 3-state buffer, rated for +64 mA and -32 mA output capability.
12 4A input Data input with bus hold, so no external pull-up resistor is needed to hold it, and it is overvoltage tolerant to 5.5 V.
13 4OE input Output enable input (active LOW); a HIGH on this pin puts outputs 4Y in the high-impedance OFF-state.
14 VCC power_in Supply voltage, recommended range 2.7 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (absolute maximum) VCC -0.5 4.6 V 5
Input voltage (absolute maximum) VI -0.5 7 V 5
Output voltage (absolute maximum) VO -0.5 7 V output in OFF-state or HIGH-state 5
Input clamping current IIK -50 mA VI < 0 V 5
Output clamping current IOK -50 mA VO < 0 V 5
Output current (absolute maximum) IO 128 mA output in LOW-state 5
Output current (absolute maximum) IO -64 mA output in HIGH-state 5
Storage temperature Tstg -65 150 °C 5
Junction temperature Tj 150 °C 5
Supply voltage (recommended operating) VCC 2.7 3.6 V 5
Input voltage (recommended operating) VI 0 5.5 V 5
HIGH-level input voltage VIH 2 V 5
LOW-level input voltage VIL 0.8 V 5
HIGH-level output current IOH -32 mA 5
LOW-level output current IOL 32 mA none 5
LOW-level output current (duty-cycle limited) 64 mA current duty cycle ≤ 50 %; f ≥ 1 kHz 5
Input transition rise and fall rate Δt/ΔV 0 10 ns/V 5
Ambient temperature Tamb -40 85 °C in free air 5
Input clamping voltage VIK -0.9 -1.2 V IIK = -18 mA; VCC = 2.7 V 5
HIGH-level output voltage VOH 2.4 2.5 V IOH = -8 mA; VCC = 2.7 V 5
HIGH-level output voltage VOH 2 2.2 V IOH = -32 mA; VCC = 3.0 V 5
LOW-level output voltage VOL 0.1 0.2 V VCC = 2.7 V; IOL = 100 μA 5
LOW-level output voltage VOL 0.3 0.5 V VCC = 2.7 V; IOL = 24 mA 6
LOW-level output voltage VOL 0.25 0.4 V VCC = 3.0 V; IOL = 16 mA 6
LOW-level output voltage VOL 0.4 0.55 V VCC = 3.0 V; IOL = 64 mA 6
Input leakage current (all input pins) II 1 10 μA VCC = 0 V or 3.6 V; VI = 5.5 V 6
Input leakage current (control pins) II -1 1 μA VCC = 3.6 V; VI = VCC or GND 6
Input leakage current (data pins) II 0.1 1 μA VCC = 3.6 V; VI = VCC 6
Input leakage current (data pins) II -1 -5 μA VCC = 3.6 V; VI = 0 V 6
Power-off leakage current IOFF -100 1 100 μA VCC = 0 V; VI or VO = 0 V to 4.5 V 6
Bus hold LOW current IBHL 75 150 μA VCC = 3 V; VI = 0.8 V 6
Bus hold HIGH current IBHH -150 -75 μA VCC = 3 V; VI = 2.0 V 6
Bus hold LOW overdrive current IBHLO 500 μA VCC = 3.6 V; VI = 0 V to 3.6 V 6
Bus hold HIGH overdrive current IBHHO -500 μA VCC = 3.6 V; VI = 0 V to 3.6 V 6
Output leakage current ILO 60 125 μA output in HIGH-state when VO > VCC; VO = 5.5 V; VCC = 3.0 V 6
Power-up/power-down output current IO(pu/pd) -100 100 μA VCC ≤ 1.2 V; VO = 0.5 V to VCC; VI = GND or VCC; nOE = don't care 6
OFF-state output current (output HIGH) IOZ 1 5 μA VCC = 3.6 V; VI = VIH or VIL; VO = 3.0 V 6
OFF-state output current (output LOW) IOZ -1 -5 μA VCC = 3.6 V; VI = VIH or VIL; VO = 0.5 V 6
Supply current (outputs HIGH) ICC 0.13 0.19 mA VCC = 3.6 V; VI = GND or VCC; IO = 0 A 6
Supply current (outputs LOW) ICC 2 7 mA VCC = 3.6 V; VI = GND or VCC; IO = 0 A 6
Supply current (outputs disabled) ICC 0.13 0.19 mA VCC = 3.6 V; VI = GND or VCC; IO = 0 A 6
Additional supply current per input pin ΔICC 0.1 0.2 mA VCC = 3 V to 3.6 V; one input at VCC - 0.6 V and other inputs at VCC or GND 6
LOW to HIGH propagation delay (nAn to nY) tPLH 4.5 ns nAn to nY; see Fig. 4; VCC = 2.7 V 7
LOW to HIGH propagation delay (nAn to nY) tPLH 1 2.7 4 ns nAn to nY; see Fig. 4; VCC = 3.0 V to 3.6 V 7
HIGH to LOW propagation delay (nAn to nY) tPHL 4.9 ns nAn to nY; see Fig. 4; VCC = 2.7 V 7
HIGH to LOW propagation delay (nAn to nY) tPHL 1 2.9 3.9 ns nAn to nY; see Fig. 4; VCC = 3.0 V to 3.6 V 7
OFF-state to HIGH propagation delay (nOE to nY) tPZH 6 ns nOE to nY; see Fig. 5; VCC = 2.7 V 7
OFF-state to HIGH propagation delay (nOE to nY) tPZH 1 3.4 4.7 ns nOE to nY; see Fig. 5; VCC = 3.0 V to 3.6 V 7
OFF-state to LOW propagation delay (nOE to nY) tPZL 6.5 ns nOE to nY; see Fig. 5; VCC = 2.7 V 7
OFF-state to LOW propagation delay (nOE to nY) tPZL 1.1 3.4 4.7 ns nOE to nY; see Fig. 5; VCC = 3.0 V to 3.6 V 7
HIGH to OFF-state propagation delay (nOE to nY) tPHZ 5.7 ns nOE to nY; see Fig. 5; VCC = 2.7 V 7
HIGH to OFF-state propagation delay (nOE to nY) tPHZ 1.8 3.7 5.1 ns nOE to nY; see Fig. 5; VCC = 3.0 V to 3.6 V 7
LOW to OFF-state propagation delay (nOE to nY) tPLZ 4 ns nOE to nY; see Fig. 5; VCC = 2.7 V 7
LOW to OFF-state propagation delay (nOE to nY) tPLZ 1.3 2.6 4.5 ns nOE to nY; see Fig. 5; VCC = 3.0 V to 3.6 V 7

CAD (KiCad official)

  • Symbol: 74LVT125PW
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: 74lvt125pw-etched.step / 74lvt125pw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lvt125pw.step / 74lvt125pw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (14 pp, sha256 ffa02677732a3a02, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF