component
74LVCE1G08W5-7
Public Made by Adomby adom
Diodes Incorporated Logic Gates, SOT-25-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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74LVCE1G08W5-7
Diodes Incorporated · Logic Gates · SOT-25-5
74LVCE1G08W5-7 from Diodes Incorporated, in a SOT-25-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Data input A of the 2-input AND gate, tolerant to 5.5V with VI range 0 to 5.5V. |
| 2 | B | input | Data input B of the 2-input AND gate, tolerant to 5.5V with VI range 0 to 5.5V. |
| 3 | GND | power_in | Ground reference; continuous current through Vdd or GND is limited to ±100 mA. |
| 4 | Y | output | Totem-pole data output (Y = A•B) with ±24mA drive at VCC = 3.3V, disabled when powered down via IOFF. |
| 5 | VCC | power_in | Supply voltage pin, operating range 1.4V to 5.5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-25-5 |
| Category | Logic |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC Operating Voltage | VCC | 1.4 | 5.5 | V | Operating voltage | 4 | |
| Data retention only supply voltage | VCC | 1.2 | V | Data retention only | 4 | ||
| High-level Input Voltage | VIH | 0.65 | x VCC | VCC = 1.4 V to 1.95 V; printed as 0.65 X VCC | 4 | ||
| High-level Input Voltage | VIH | 1.7 | V | VCC = 2.3 V to 2.7 V | 4 | ||
| High-level Input Voltage | VIH | 2 | V | VCC = 3 V to 3.6 V | 4 | ||
| High-level Input Voltage | VIH | 0.7 | x VCC | VCC = 4.5 V to 5.5 V; printed as 0.7 X VCC | 4 | ||
| Low-level input voltage | VIL | 0.35 | x VCC | VCC = 1.4 V to 1.95 V; printed as 0.35 X VCC | 4 | ||
| Low-level input voltage | VIL | 0.7 | V | VCC = 2.3 V to 2.7 V | 4 | ||
| Low-level input voltage | VIL | 0.8 | V | VCC = 3 V to 3.6 V | 4 | ||
| Low-level input voltage | VIL | 0.3 | x VCC | VCC = 4.5 V to 5.5 V; printed as 0.3 X VCC | 4 | ||
| Input Voltage | VI | 0 | 5.5 | V | 4 | ||
| Output Voltage | VO | 0 | V | Upper limit printed as VCC | 4 | ||
| High-level output current | IOH | -3 | mA | VCC = 1.4 V | 4 | ||
| High-level output current | IOH | -4 | mA | VCC = 1.65 V | 4 | ||
| High-level output current | IOH | -8 | mA | VCC = 2.3 V | 4 | ||
| High-level output current | IOH | -16 | mA | VCC = 3 V | 4 | ||
| High-level output current | IOH | -24 | mA | Unlabelled row following VCC = 3 V | 4 | ||
| High-level output current | IOH | -32 | mA | VCC = 4.5 V | 4 | ||
| Low-level output current | IOL | 3 | mA | VCC = 1.4 V | 4 | ||
| Low-level output current | IOL | 4 | mA | VCC = 1.65 V | 4 | ||
| Low-level output current | IOL | 8 | mA | VCC = 2.3 V | 4 | ||
| Low-level output current | IOL | 16 | mA | VCC = 3 V | 4 | ||
| Low-level output current | IOL | 24 | mA | Unlabelled row following VCC = 3 V | 4 | ||
| Low-level output current | IOL | 32 | mA | VCC = 4.5 V | 4 | ||
| Input transition rise or fall rate | Δt/ΔV | 20 | ns/V | VCC = 1.4 to 3 V | 4 | ||
| Input transition rise or fall rate | Δt/ΔV | 10 | ns/V | VCC = 3.3 V ± 0.3 V | 4 | ||
| Input transition rise or fall rate | Δt/ΔV | 5 | ns/V | VCC = 5 V ± 0.5 V | 4 | ||
| Operating free-air temperature | TA | -40 | 85 | ºC | 4 | ||
| ESD HBM Human Body Model ESD Protection | ESD HBM | 2 | KV | 3 | |||
| ESD MM Machine Model ESD Protection | ESD MM | 200 | V | 3 | |||
| Supply Voltage Range | VCC | -0.5 | 6.5 | V | 3 | ||
| Input Voltage Range | VI | -0.5 | 6.5 | V | 3 | ||
| Voltage applied to output in high impedance or IOFF state | Vo | -0.5 | 6.5 | V | Output in high impedance or IOFF state | 3 | |
| Voltage applied to output in high or low state | Vo | -0.3 | V | Output in high or low state; upper limit printed as VCC +0.5 | 3 | ||
| Input Clamp Current | IIK | -50 | mA | VI<0 | 3 | ||
| Output Clamp Current | IOK | -50 | mA | 3 | |||
| Continuous output current | IO | -50 | 50 | mA | 3 | ||
| Continuous current through Vdd or GND | -100 | 100 | mA | 3 | |||
| Operating Junction Temperature | TJ | -40 | 150 | °C | 3 | ||
| Storage Temperature | TSTG | -65 | 150 | °C | 3 | ||
| High Level Output Voltage (printed as VCC, 0.1 V) | VOH | 0.1 | V | IOH = -100μA; VCC 1.4 V to 5.5 V | 5 | ||
| High Level Output Voltage | VOH | 1.05 | V | IOH = -3mA; VCC 1.4 V | 5 | ||
| High Level Output Voltage | VOH | 1.2 | V | IOH = -4mA; VCC 1.65 V | 5 | ||
| High Level Output Voltage | VOH | 1.9 | V | IOH = -8mA; VCC 2.3 V | 5 | ||
| High Level Output Voltage | VOH | 2.4 | V | IOH = -16mA; VCC 3 V | 5 | ||
| High Level Output Voltage | VOH | 2.3 | V | IOH = -24mA | 5 | ||
| High Level Output Voltage | VOH | 3.8 | V | IOH = -32mA; VCC 4.5 V | 5 | ||
| Low Level Output Voltage | VOL | 0.1 | V | IOL = 100μA; VCC 1.4 V to 5.5V | 5 | ||
| Low Level Output Voltage | VOL | 0.4 | V | IOL = 3mA; VCC 1.4 V | 5 | ||
| Low Level Output Voltage | VOL | 0.45 | V | IOL = 4mA; VCC 1.65 V | 5 | ||
| Low Level Output Voltage | VOL | 0.3 | V | IOL = 8mA; VCC 2.3 V | 5 | ||
| Low Level Output Voltage | VOL | 0.55 | V | IOL = 24mA | 5 | ||
| Input Current | II | -5 | 5 | μA | VI = 5.5 V or GND; VCC 0 to 5.5 V | 5 | |
| Power Down Leakage Current | IOFF | -10 | 10 | μA | VI or VO = 5.5V; VCC 0 | 5 | |
| Supply Current | ICC | 10 | μA | VI = 5.5V of GND; IO=0; VCC 1.4 V to 5.5V | 5 | ||
| Additional Supply Current | ΔICC | 500 | μA | One input at VCC, 0.6 V; other inputs at VCC or GND; VCC 3 V to 5.5V | 5 | ||
| Input Capacitance | Ci | 3.5 | pF | VI = VCC or GND; VCC 3.3 V | 5 | ||
| Thermal Resistance Junction-to-Ambient (SOT25) | θJA | 204 | C/W | Device mounted on FR-4 substrate PC board, 2oz copper, with minimum recommended pad layout (Note 5) | 5 | ||
| Thermal Resistance Junction-to-Case (SOT25) | θJC | 52 | C/W | Note 5 test condition (FR-4, 2oz copper, minimum recommended pad layout) | 5 |
CAD (KiCad official)
- Symbol:
74LVCE1G08W5-7 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-25-5 (KiCad packages3D, STEP)
- 3D model files:
74lvce1g08w5-7-etched.step/74lvce1g08w5-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lvce1g08w5-7.step/74lvce1g08w5-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (14 pp, sha256
fdcd36e80cf3b3fe, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).