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74LVC8T595BQX
Public Made by Adomby adom
Nexperia Shift Registers, DHVQFN-20-EP(2.5x4.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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PCB Footprint
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Datasheet
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README
markdown74LVC8T595BQX
Nexperia · Shift Registers · DHVQFN-20-EP(2.5x4.5)
74LVC8T595BQX from Nexperia, in a DHVQFN-20-EP(2.5x4.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC(B) | power_in | Supply voltage B for the Qn outputs, operating from 1.1 V to 5.5 V with absolute maximum rating of -0.5 V to +6.5 V. |
| 2 | Q0 | tri_state | Parallel data output Q0 referenced to VCC(B), 3-state with high-impedance OFF-state when OE is HIGH or in suspend mode, with ±24 mA drive at VCC(A) = VCC(B) = 3.0 V. |
| 3 | Q1 | tri_state | Parallel data output Q1 referenced to VCC(B), 3-state with high-impedance OFF-state when OE is HIGH or in suspend mode, with ±24 mA drive at VCC(A) = VCC(B) = 3.0 V. |
| 4 | Q2 | tri_state | Parallel data output Q2 referenced to VCC(B), 3-state with high-impedance OFF-state when OE is HIGH or in suspend mode, with ±24 mA drive at VCC(A) = VCC(B) = 3.0 V. |
| 5 | Q3 | tri_state | Parallel data output Q3 referenced to VCC(B), 3-state with high-impedance OFF-state when OE is HIGH or in suspend mode, with ±24 mA drive at VCC(A) = VCC(B) = 3.0 V. |
| 6 | Q4 | tri_state | Parallel data output Q4 referenced to VCC(B), 3-state with high-impedance OFF-state when OE is HIGH or in suspend mode, with ±24 mA drive at VCC(A) = VCC(B) = 3.0 V. |
| 7 | Q5 | tri_state | Parallel data output Q5 referenced to VCC(B), 3-state with high-impedance OFF-state when OE is HIGH or in suspend mode, with ±24 mA drive at VCC(A) = VCC(B) = 3.0 V. |
| 8 | Q6 | tri_state | Parallel data output Q6 referenced to VCC(B), 3-state with high-impedance OFF-state when OE is HIGH or in suspend mode, with ±24 mA drive at VCC(A) = VCC(B) = 3.0 V. |
| 9 | Q7 | tri_state | Parallel data output Q7 referenced to VCC(B), 3-state with high-impedance OFF-state when OE is HIGH or in suspend mode, with ±24 mA drive at VCC(A) = VCC(B) = 3.0 V. |
| 10 | GND | power_in | Ground (0 V) reference for the device. |
| 11 | GND | power_in | Ground (0 V) reference for the device. |
| 12 | GND | power_in | Ground (0 V) reference for the device. |
| 13 | GND | power_in | Ground (0 V) reference for the device. |
| 14 | Q7S | output | Serial data output referenced to VCC(A), carrying the shift register contents shifted through the stages as described in the function table. |
| 15 | MR | input | Master reset input, active LOW, referenced to VCC(A); a LOW clears only the shift register and does not affect the storage register. |
| 16 | SHCP | input | Shift register clock input referenced to VCC(A); data is shifted into the shift register on positive-going (LOW-to-HIGH) transitions. |
| 17 | STCP | input | Storage register clock input referenced to VCC(A); shift register contents are transferred to the storage register and parallel outputs on a positive-going transition. |
| 18 | OE | input | Output enable input, active LOW, referenced to VCC(A); a HIGH places the Qn outputs in the high-impedance OFF-state. |
| 19 | DS | input | Serial data input to the shift register referenced to VCC(A). |
| 20 | VCC(A) | power_in | Supply voltage A for the MR, SHCP, STCP, OE and DS inputs and the Q7S output, operating from 1.1 V to 5.5 V with absolute maximum rating of -0.5 V to +6.5 V. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | DHVQFN-20-EP(2.5x4.5) |
| Category | Logic |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage A | VCC(A) | 1.1 | 5.5 | V | 6 | ||
| supply voltage B | VCC(B) | 1.1 | 5.5 | V | 6 | ||
| input voltage | VI | 0 | 5.5 | V | 6 | ||
| output voltage, active mode | VO | 0 | V | Active mode | 6 | ||
| output voltage, suspend or 3-state mode | VO | 0 | 5.5 | V | Suspend or 3-state mode | 6 | |
| ambient temperature | Tamb | -40 | 125 | °C | 6 | ||
| input transition rise and fall rate | Δt/ΔV | 20 | ns/V | VCC(A) = 1.1 V to 1.3 V | 6 | ||
| input transition rise and fall rate | Δt/ΔV | 10 | ns/V | VCC(A) = 3 V to 3.6 V | 6 | ||
| input transition rise and fall rate | Δt/ΔV | 5 | ns/V | VCC(A) = 4.5 V to 5.5 V | 6 | ||
| supply voltage A | VCC(A) | -0.5 | 6.5 | V | 5 | ||
| supply voltage B | VCC(B) | -0.5 | 6.5 | V | 5 | ||
| input clamping current | IIK | -50 | mA | VI < 0 V | 5 | ||
| input voltage | VI | -0.5 | 6.5 | V | 5 | ||
| output clamping current | IOK | -50 | mA | VO < 0 V | 5 | ||
| output voltage, active mode | VO | -0.5 | V | Active mode | 5 | ||
| output voltage, suspend or 3-state mode | VO | -0.5 | 6.5 | V | Suspend or 3-state mode | 5 | |
| output current | IO | -50 | 50 | mA | VO = 0 V to VCCO | 5 | |
| supply current | ICC | 100 | mA | ICC(A) or ICC(B) | 5 | ||
| ground current | IGND | -100 | mA | 5 | |||
| storage temperature | Tstg | -65 | 150 | °C | 5 | ||
| total power dissipation | Ptot | 500 | mW | Tamb = -40 °C to +125 °C | 5 | ||
| HIGH-level input voltage | VIH | 1.7 | V | VCC(A) = 2.3 V to 2.7 V; -40 °C to +125 °C | 7 | ||
| HIGH-level input voltage | VIH | 2 | V | VCC(A) = 3.0 V to 3.6 V; -40 °C to +125 °C | 7 | ||
| LOW-level input voltage | VIL | 0.7 | V | VCC(A) = 2.3 V to 2.7 V; -40 °C to +125 °C | 7 | ||
| LOW-level input voltage | VIL | 0.8 | V | VCC(A) = 3.0 V to 3.6 V; -40 °C to +125 °C | 7 | ||
| HIGH-level output voltage | VOH | 0.825 | V | VI = VIH or VIL; IO = -2 mA; VCCO = 1.1 V; -40 °C to +125 °C | 7 | ||
| HIGH-level output voltage | VOH | 1 | V | VI = VIH or VIL; IO = -6 mA; VCCO = 1.4 V; -40 °C to +125 °C | 7 | ||
| HIGH-level output voltage | VOH | 1.2 | V | VI = VIH or VIL; IO = -8 mA; VCCO = 1.65 V; -40 °C to +125 °C | 7 | ||
| HIGH-level output voltage | VOH | 1.9 | V | VI = VIH or VIL; IO = -12 mA; VCCO = 2.3 V; -40 °C to +125 °C | 7 | ||
| HIGH-level output voltage | VOH | 2.4 | V | VI = VIH or VIL; IO = -24 mA; VCCO = 3.0 V; -40 °C to +125 °C | 7 | ||
| HIGH-level output voltage | VOH | 3.85 | V | VI = VIH or VIL; IO = -24 mA; VCCO = 4.5 V; -40 °C to +125 °C | 7 | ||
| HIGH-level output voltage | VOH | 3.8 | V | VI = VIH or VIL; IO = -32 mA; VCCO = 4.5 V; -40 °C to +125 °C | 7 | ||
| LOW-level output voltage | VOL | 0.1 | V | VI = VIH or VIL; IO = 100 μA; VCCO = 1.1 V to 4.5 V; -40 °C to +125 °C | 7 | ||
| LOW-level output voltage | VOL | 0.275 | V | VI = VIH or VIL; IO = 2 mA; VCCO = 1.1 V; -40 °C to +125 °C | 7 | ||
| LOW-level output voltage | VOL | 0.3 | V | VI = VIH or VIL; IO = 6 mA; VCCO = 1.4 V; -40 °C to +125 °C | 7 | ||
| LOW-level output voltage | VOL | 0.45 | V | VI = VIH or VIL; IO = 8 mA; VCCO = 1.65 V; -40 °C to +125 °C | 7 | ||
| LOW-level output voltage | VOL | 0.55 | V | VI = VIH or VIL; IO = 24 mA; VCCO = 3.0 V; -40 °C to +125 °C | 7 | ||
| LOW-level output voltage | VOL | 0.5 | V | VI = VIH or VIL; IO = 24 mA; VCCO = 4.5 V; -40 °C to +125 °C | 7 | ||
| input leakage current | II | -10 | 10 | μA | MR, SHCP, STCP, OE and DS inputs; VI = 0 V to 5.5 V; VCC(A) = 1.1 V to 5.5 V; -40 °C to +125 °C | 7 | |
| OFF-state output current | IOZ | -10 | 10 | μA | suspend mode; VCC(A) = 0 V; VCC(B) = 5.5 V; -40 °C to +125 °C | 7 | |
| power-off leakage current | IOFF | -10 | 10 | μA | inputs, Q7S output; VI or VO = 0 V to 5.5 V; VCC(A) = 0 V; VCC(B) = 1.1 V to 5.5 V; -40 °C to +125 °C | 8 | |
| supply current, VCC(A) domain | ICC | 5 | μA | VI = 0 V or VCC(A); IO = 0 A; VCC(A), VCC(B) = 1.1 V to 5.5 V; -40 °C to +125 °C | 8 | ||
| supply current, VCC(A) domain | ICC | -2 | μA | VI = 0 V or VCC(A); IO = 0 A; VCC(A) = 0 V; VCC(B) = 5.5 V; -40 °C to +125 °C | 8 | ||
| supply current, VCC(B) domain | ICC | 24 | μA | VI = 0 V or VCC(A); IO = 0 A; VCC(A), VCC(B) = 1.1 V to 5.5 V; -40 °C to +125 °C | 8 | ||
| supply current, VCC(B) domain | ICC | -2 | μA | VI = 0 V or VCC(A); IO = 0 A; VCC(B) = 0 V; VCC(A) = 5.5 V; -40 °C to +125 °C | 8 | ||
| additional supply current | ΔICC | 75 | μA | per input; MR, SHCP, STCP, OE inputs; one input at VCC(A) - 0.6 V; DS input at VCC(A) or GND; Qn = open; -40 °C to +125 °C | 8 |
CAD (KiCad official)
- Symbol:
74LVC8T595BQX - Footprint:
Package_DFN_QFN:DHVQFN-20-1EP_2.5x4.5mm_P0.5mm_EP1x3mm - 3D model: DHVQFN-20-EP(2.5x4.5), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
74lvc8t595bqx-etched.step/74lvc8t595bqx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lvc8t595bqx.step/74lvc8t595bqx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (28 pp, sha256
2141db6e89512526, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).