component
74LVC8T245PW
Public Made by Adomby adom
Nexperia Translators, Level Shifters, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74LVC8T245PW
Nexperia · Translators, Level Shifters · TSSOP-24
74LVC8T245PW from Nexperia, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC(A) | power_in | Supply voltage A, specified from 1.2 V to 5.5 V; the An inputs/outputs, OE and DIR inputs are referenced to VCC(A). |
| 2 | DIR | input | Direction control: HIGH allows transmission from An to Bn and LOW allows transmission from Bn to An; referenced to VCC(A). |
| 3 | A1 | bidirectional | Data input or output on the A side, referenced to VCC(A) and high-impedance in suspend or 3-state mode. |
| 4 | A2 | bidirectional | Data input or output on the A side, referenced to VCC(A) and high-impedance in suspend or 3-state mode. |
| 5 | A3 | bidirectional | Data input or output on the A side, referenced to VCC(A) and high-impedance in suspend or 3-state mode. |
| 6 | A4 | bidirectional | Data input or output on the A side, referenced to VCC(A) and high-impedance in suspend or 3-state mode. |
| 7 | A5 | bidirectional | Data input or output on the A side, referenced to VCC(A) and high-impedance in suspend or 3-state mode. |
| 8 | A6 | bidirectional | Data input or output on the A side, referenced to VCC(A) and high-impedance in suspend or 3-state mode. |
| 9 | A7 | bidirectional | Data input or output on the A side, referenced to VCC(A) and high-impedance in suspend or 3-state mode. |
| 10 | A8 | bidirectional | Data input or output on the A side, referenced to VCC(A) and high-impedance in suspend or 3-state mode. |
| 11 | GND | power_in | Ground (0 V); all GND pins must be connected to ground. |
| 12 | GND | power_in | Ground (0 V); all GND pins must be connected to ground. |
| 13 | GND | power_in | Ground (0 V); all GND pins must be connected to ground. |
| 14 | B8 | bidirectional | Data input or output on the B side, referenced to VCC(B) and high-impedance in suspend or 3-state mode. |
| 15 | B7 | bidirectional | Data input or output on the B side, referenced to VCC(B) and high-impedance in suspend or 3-state mode. |
| 16 | B6 | bidirectional | Data input or output on the B side, referenced to VCC(B) and high-impedance in suspend or 3-state mode. |
| 17 | B5 | bidirectional | Data input or output on the B side, referenced to VCC(B) and high-impedance in suspend or 3-state mode. |
| 18 | B4 | bidirectional | Data input or output on the B side, referenced to VCC(B) and high-impedance in suspend or 3-state mode. |
| 19 | B3 | bidirectional | Data input or output on the B side, referenced to VCC(B) and high-impedance in suspend or 3-state mode. |
| 20 | B2 | bidirectional | Data input or output on the B side, referenced to VCC(B) and high-impedance in suspend or 3-state mode. |
| 21 | B1 | bidirectional | Data input or output on the B side, referenced to VCC(B) and high-impedance in suspend or 3-state mode. |
| 22 | OE | input | Output enable input (active LOW); a HIGH level puts both A and B ports in the high-impedance OFF-state; referenced to VCC(A). |
| 23 | VCC(B) | power_in | Supply voltage B, specified from 1.2 V to 5.5 V; the Bn inputs/outputs are referenced to VCC(B). |
| 24 | VCC(B) | power_in | Supply voltage B, specified from 1.2 V to 5.5 V; the Bn inputs/outputs are referenced to VCC(B). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-24 |
| Category | Logic |
| Pins | 24 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC(A) supply voltage A | VCC(A) | -0.5 | 6.5 | V | 5 | ||
| VCC(B) supply voltage B | VCC(B) | -0.5 | 6.5 | V | 5 | ||
| input clamping current | IIK | -50 | mA | VI < 0 V | 5 | ||
| input voltage | VI | -0.5 | 6.5 | V | 5 | ||
| output clamping current | IOK | -50 | mA | VO < 0 V | 5 | ||
| output voltage, suspend or 3-state mode | VO | -0.5 | 6.5 | V | Suspend or 3-state mode | 5 | |
| output current | IO | -50 | 50 | mA | VO = 0 V to VCCO | 5 | |
| supply current per VCC pin | ICC | 100 | mA | ICC(A) or ICC(B); per VCC pin | 5 | ||
| ground current per GND pin | IGND | -100 | mA | per GND pin | 5 | ||
| storage temperature | Tstg | -65 | 150 | °C | 5 | ||
| total power dissipation (SOT355-1 TSSOP24) | Ptot | 500 | mW | Tamb = -40 °C to +125 °C; SOT355-1 (TSSOP24) | 5 | ||
| supply voltage A (recommended) | VCC(A) | 1.2 | 5.5 | V | 5 | ||
| supply voltage B (recommended) | VCC(B) | 1.2 | 5.5 | V | 5 | ||
| input voltage (recommended) | VI | 0 | 5.5 | V | 5 | ||
| output voltage, suspend or 3-state mode (recommended) | VO | 0 | 5.5 | V | Suspend or 3-state mode | 5 | |
| ambient temperature | Tamb | -40 | 125 | °C | 5 | ||
| input transition rise and fall rate | Δt/ΔV | 20 | ns/V | VCCI = 1.2 V | 5 | ||
| input transition rise and fall rate | Δt/ΔV | 10 | ns/V | VCCI = 3 V to 3.6 V | 5 | ||
| input transition rise and fall rate | Δt/ΔV | 5 | ns/V | VCCI = 4.5 V to 5.5 V | 5 | ||
| HIGH-level input voltage, data input | VIH | 1.7 | V | VCCI = 2.3 V to 2.7 V | 7 | ||
| HIGH-level input voltage, data input | VIH | 2 | V | VCCI = 3.0 V to 3.6 V | 7 | ||
| HIGH-level input voltage, DIR and OE input | VIH | 1.7 | V | VCCI = 2.3 V to 2.7 V | 7 | ||
| HIGH-level input voltage, DIR and OE input | VIH | 2 | V | VCCI = 3.0 V to 3.6 V | 7 | ||
| LOW-level input voltage, data input | VIL | 0.7 | V | VCCI = 2.3 V to 2.7 V | 7 | ||
| LOW-level input voltage, data input | VIL | 0.8 | V | VCCI = 3.0 V to 3.6 V | 7 | ||
| LOW-level input voltage, DIR and OE input | VIL | 0.7 | V | VCCI = 2.3 V to 2.7 V | 7 | ||
| LOW-level input voltage, DIR and OE input | VIL | 0.8 | V | VCCI = 3.0 V to 3.6 V | 7 | ||
| HIGH-level output voltage | VOH | 1 | V | VI = VIH; IO = -6 mA; VCCO = 1.4 V | 7 | ||
| HIGH-level output voltage | VOH | 1.2 | V | VI = VIH; IO = -8 mA; VCCO = 1.65 V | 7 | ||
| HIGH-level output voltage | VOH | 1.9 | V | VI = VIH; IO = -12 mA; VCCO = 2.3 V | 7 | ||
| HIGH-level output voltage | VOH | 2.4 | V | VI = VIH; IO = -24 mA; VCCO = 3.0 V | 7 | ||
| HIGH-level output voltage | VOH | 3.8 | V | VI = VIH; IO = -32 mA; VCCO = 4.5 V | 7 | ||
| LOW-level output voltage | VOL | 0.1 | V | VI = VIL; IO = 100 μA; VCCO = 1.2 V to 4.5 V | 7 | ||
| LOW-level output voltage | VOL | 0.3 | V | VI = VIL; IO = 6 mA; VCCO = 1.4 V | 7 | ||
| LOW-level output voltage | VOL | 0.45 | V | VI = VIL; IO = 8 mA; VCCO = 1.65 V | 7 | ||
| LOW-level output voltage | VOL | 0.55 | V | VI = VIL; IO = 24 mA; VCCO = 3.0 V | 7 | ||
| input leakage current | II | -10 | 10 | μA | DIR, OE input; VI = 0 V to 5.5 V; VCCI = 1.2 V to 5.5 V | 7 | |
| OFF-state output current | IOZ | -10 | 10 | μA | A or B port; VO = 0 V or VCCO; VCCO = 1.2 V to 5.5 V | 8 | |
| OFF-state output current, suspend mode | IOZ | -10 | 10 | μA | A port; VO = 0 V or VCCO; VCC(A) = 5.5 V; VCC(B) = 0 V | 8 | |
| power-off leakage current | IOFF | -10 | 10 | μA | A port; VI or VO = 0 V to 5.5 V; VCC(A) = 0 V; VCC(B) = 1.2 V to 5.5 V | 8 | |
| supply current, A port | ICC | 20 | μA | A port; VI = 0 V or VCCI; IO = 0 A; VCC(A), VCC(B) = 1.2 V to 5.5 V | 9 | ||
| supply current, A port | ICC | -4 | μA | A port; VI = 0 V or VCCI; IO = 0 A; VCC(A) = 0 V; VCC(B) = 5.5 V | 9 | ||
| supply current, B port | ICC | 20 | μA | B port; VI = 0 V or VCCI; IO = 0 A; VCC(A), VCC(B) = 1.2 V to 5.5 V | 9 | ||
| supply current, B port | ICC | -4 | μA | B port; VI = 0 V or VCCI; IO = 0 A; VCC(B) = 0 V; VCC(A) = 5.5 V | 9 | ||
| supply current, A plus B port | ICC | 30 | μA | A plus B port (ICC(A) + ICC(B)); IO = 0 A; VI = 0 V or VCCI; VCC(A), VCC(B) = 1.2 V to 5.5 V | 9 | ||
| additional supply current, DIR and OE input | ΔICC | 75 | μA | per input; VCC(A), VCC(B) = 3.0 V to 5.5 V; DIR or OE input at VCC(A) - 0.6 V; A port at VCC(A) or GND; B port = open | 9 | ||
| additional supply current, A port | ΔICC | 75 | μA | per input; VCC(A), VCC(B) = 3.0 V to 5.5 V; A port at VCC(A) - 0.6 V; DIR at VCC(A); B port = open | 9 | ||
| additional supply current, B port | ΔICC | 75 | μA | per input; VCC(A), VCC(B) = 3.0 V to 5.5 V; B port at VCC(B) - 0.6 V; DIR at GND; A port = open | 9 |
CAD (KiCad official)
- Symbol:
74LVC8T245PW - Footprint:
Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm - 3D model: TSSOP-24 (KiCad packages3D, STEP)
- 3D model files:
74lvc8t245pw-etched.step/74lvc8t245pw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lvc8t245pw.step/74lvc8t245pw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (28 pp, sha256
5349ff0263d799f6, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).