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Contents

README

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74LVC74APW

Nexperia · Flip Flops · TSSOP-14

74LVC74APW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1RD input Asynchronous reset-direct input (active LOW) for flip-flop 1; resets output independent of clock input.
2 1D input Data input for flip-flop 1; transfers to Q output on LOW-to-HIGH clock transition; must be stable one setup time prior to clock edge.
3 1CP input Clock input for flip-flop 1 (LOW-to-HIGH edge-triggered); data transfers to output on rising edge.
4 1SD input Asynchronous set-direct input (active LOW) for flip-flop 1; sets output independent of clock input.
5 1Q output True output of flip-flop 1; direct Q output.
6 1Q output Complement output of flip-flop 1; inverse Q output (Q̅).
7 GND power_in Ground (0 V); reference potential for all voltage measurements.
8 2Q output Complement output of flip-flop 2; inverse Q output (Q̅).
9 2Q output True output of flip-flop 2; direct Q output.
10 2SD input Asynchronous set-direct input (active LOW) for flip-flop 2; sets output independent of clock input.
11 2CP input Clock input for flip-flop 2 (LOW-to-HIGH edge-triggered); data transfers to output on rising edge.
12 2D input Data input for flip-flop 2; transfers to Q output on LOW-to-HIGH clock transition; must be stable one setup time prior to clock edge.
13 2RD input Asynchronous reset-direct input (active LOW) for flip-flop 2; resets output independent of clock input.
14 VCC power_in Supply voltage; recommended range 1.2 V to 3.6 V; 5 V tolerant inputs.

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: 74LVC74APW
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: 74lvc74apw-etched.step / 74lvc74apw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lvc74apw.step / 74lvc74apw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (16 pp, sha256 66c1f80f9550c368, retrieved 2026-09-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF