component
74LVC574AT20-13
Public Made by Adomby adom
Diodes Incorporated Flip Flops, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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PCB Footprint
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Datasheet
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README
markdown74LVC574AT20-13
Diodes Incorporated · Flip Flops · TSSOP-20
74LVC574AT20-13 from Diodes Incorporated, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Buffered output-enable input; when high it places all eight Q outputs in the high-impedance (Z) state, and it does not affect the internal latch operation. |
| 2 | D1 | input | Data input for flip-flop 1, sampled on the positive transition of CLK; inputs accept up to 5.5 V and have Schmitt trigger action. |
| 3 | D2 | input | Data input for flip-flop 2, sampled on the positive transition of CLK; inputs accept up to 5.5 V and have Schmitt trigger action. |
| 4 | D3 | input | Data input for flip-flop 3, sampled on the positive transition of CLK; inputs accept up to 5.5 V and have Schmitt trigger action. |
| 5 | D4 | input | Data input for flip-flop 4, sampled on the positive transition of CLK; inputs accept up to 5.5 V and have Schmitt trigger action. |
| 6 | D5 | input | Data input for flip-flop 5, sampled on the positive transition of CLK; inputs accept up to 5.5 V and have Schmitt trigger action. |
| 7 | D6 | input | Data input for flip-flop 6, sampled on the positive transition of CLK; inputs accept up to 5.5 V and have Schmitt trigger action. |
| 8 | D7 | input | Data input for flip-flop 7, sampled on the positive transition of CLK; inputs accept up to 5.5 V and have Schmitt trigger action. |
| 9 | D8 | input | Data input for flip-flop 8, sampled on the positive transition of CLK; inputs accept up to 5.5 V and have Schmitt trigger action. |
| 10 | GND | power_in | Ground reference; continuous current through GND is rated at -100 mA maximum. |
| 11 | CLK | input | Clock input; on its positive transition the Q outputs take the logic levels present at the D inputs, with Schmitt trigger action at the input. |
| 12 | Q8 | tri_state | 3-state latch output for flip-flop 8, capable of sinking or sourcing 24 mA at VCC = 3 V. |
| 13 | Q7 | tri_state | 3-state latch output for flip-flop 7, capable of sinking or sourcing 24 mA at VCC = 3 V. |
| 14 | Q6 | tri_state | 3-state latch output for flip-flop 6, capable of sinking or sourcing 24 mA at VCC = 3 V. |
| 15 | Q5 | tri_state | 3-state latch output for flip-flop 5, capable of sinking or sourcing 24 mA at VCC = 3 V. |
| 16 | Q4 | tri_state | 3-state latch output for flip-flop 4, capable of sinking or sourcing 24 mA at VCC = 3 V. |
| 17 | Q3 | tri_state | 3-state latch output for flip-flop 3, capable of sinking or sourcing 24 mA at VCC = 3 V. |
| 18 | Q2 | tri_state | 3-state latch output for flip-flop 2, capable of sinking or sourcing 24 mA at VCC = 3 V. |
| 19 | Q1 | tri_state | 3-state latch output for flip-flop 1, capable of sinking or sourcing 24 mA at VCC = 3 V. |
| 20 | VCC | power_in | Supply voltage; the recommended operating range is 1.65 V to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage Operating | VCC | 1.65 | 3.6 | V | Operating | 3 | |
| Supply Voltage Data Retention | VCC | 1.5 | V | Data Retention Only | 3 | ||
| Input Voltage | VI | 0 | 5.5 | V | 3 | ||
| High-Level Output Current | IOH | -4 | mA | VCC = 1.65V | 3 | ||
| High-Level Output Current | IOH | -8 | mA | VCC = 2.3V | 3 | ||
| High-Level Output Current | IOH | -12 | mA | VCC = 2.7V | 3 | ||
| High-Level Output Current | IOH | -24 | mA | VCC = 3.0V | 3 | ||
| Low-Level Output Current | IOL | 4 | mA | VCC = 1.65V | 3 | ||
| Low-Level Output Current | IOL | 8 | mA | VCC = 2.3V | 3 | ||
| Low-Level Output Current | IOL | 12 | mA | VCC = 2.7V | 3 | ||
| Low-Level Output Current | IOL | 24 | mA | VCC = 3.0V | 3 | ||
| Operating Free-Air Temperature | TA | -40 | 125 | °C | 3 | ||
| Supply Voltage Range | VCC | -0.5 | 7 | V | 3 | ||
| Input Voltage Range | VI | -0.5 | 7 | V | 3 | ||
| Input Clamp Current | IIK | -20 | mA | VI < 0V | 3 | ||
| Output Clamp Current | IOK | -50 | mA | VO < 0V | 3 | ||
| Continuous Output Current | IO | -50 | 50 | mA | -0.5V < VO < VCC+0.5V | 3 | |
| Continuous Current Through VCC | ICC | 100 | mA | 3 | |||
| Continuous Current Through GND | IGND | -100 | mA | 3 | |||
| Operating Junction Temperature | TJ | -40 | 150 | °C | 3 | ||
| Storage Temperature | TSTG | -65 | 150 | °C | 3 | ||
| Total Power Dissipation | PTOT | 500 | mW | 3 | |||
| High-Level Input Voltage | VIH | 1.7 | V | VCC 2.3V to 2.7V; TA = -40°C to +85°C | 4 | ||
| High-Level Input Voltage | VIH | 2 | V | VCC 3.0V to 3.6V; TA = -40°C to +85°C | 4 | ||
| Low-Level Input Voltage | VIL | 0.7 | V | VCC 2.3V to 2.7V; TA = -40°C to +85°C | 4 | ||
| Low-Level Input Voltage | VIL | 0.8 | V | VCC 3.0V to 3.6V; TA = -40°C to +85°C | 4 | ||
| High-Level Output Voltage | VOH | 1.2 | V | IOH = -4mA; VCC 1.65V; TA = -40°C to +85°C | 4 | ||
| High-Level Output Voltage | VOH | 1.05 | V | IOH = -4mA; VCC 1.65V; TA = -40°C to +125°C | 4 | ||
| High-Level Output Voltage | VOH | 1.7 | V | IOH = -8mA; VCC 2.3V; TA = -40°C to +85°C | 4 | ||
| High-Level Output Voltage | VOH | 1.65 | V | IOH = -8mA; VCC 2.3V; TA = -40°C to +125°C | 4 | ||
| High-Level Output Voltage | VOH | 2.2 | V | IOH = -12mA; VCC 2.7V; TA = -40°C to +85°C | 4 | ||
| High-Level Output Voltage | VOH | 2.05 | V | IOH = -12mA; VCC 2.7V; TA = -40°C to +125°C | 4 | ||
| High-Level Output Voltage | VOH | 2.3 | V | IOH = -24mA; VCC 3.0V; TA = -40°C to +85°C | 4 | ||
| High-Level Output Voltage | VOH | 2 | V | IOH = -24mA; VCC 3.0V; TA = -40°C to +125°C | 4 | ||
| Low-Level Output Voltage | VOL | 0.2 | V | IOL = 100μA; VCC 1.65V to 3.6V; TA = -40°C to +85°C | 4 | ||
| Low-Level Output Voltage | VOL | 0.3 | V | IOL = 100μA; VCC 1.65V to 3.6V; TA = -40°C to +125°C | 4 | ||
| Low-Level Output Voltage | VOL | 0.45 | V | IOL = 4mA; VCC 1.65V; TA = -40°C to +85°C | 4 | ||
| Low-Level Output Voltage | VOL | 0.65 | V | IOL = 4mA; VCC 1.65V; TA = -40°C to +125°C | 4 | ||
| Low-Level Output Voltage | VOL | 0.6 | V | IOL = 8mA; VCC 2.3V; TA = -40°C to +85°C | 4 | ||
| Low-Level Output Voltage | VOL | 0.8 | V | IOL = 8mA; VCC 2.3V; TA = -40°C to +125°C | 4 | ||
| Low-Level Output Voltage | VOL | 0.4 | V | IOL = 12mA; VCC 2.7V; TA = -40°C to +85°C | 4 | ||
| Low-Level Output Voltage | VOL | 0.55 | V | IOL = 24mA; VCC 3.0V; TA = -40°C to +85°C | 4 | ||
| Power Down Leakage Current | IOFF | -10 | 10 | μA | VI or VO = 0 or 5.5V; VCC 0V; TA = -40°C to +85°C | 4 | |
| Power Down Leakage Current | IOFF | 20 | μA | VI or VO = 0 or 5.5V; VCC 0V; TA = -40°C to +125°C | 4 | ||
| Input Current Control Pins | II | -5 | 5 | μA | VI = GND or 5.5V; VCC 0 to 3.6V; TA = -40°C to +85°C | 4 | |
| Input Current Control Pins | II | -20 | 20 | μA | VI = GND or 5.5V; VCC 0 to 3.6V; TA = -40°C to +125°C | 4 | |
| Z-State Current including Input Current I/O Pins | IOZ | -5 | 5 | µA | VI = GND or 5.5V; VO = 0 to 5.5V; VCC 3.6V; TA = -40°C to +85°C | 4 | |
| Z-State Current including Input Current I/O Pins | IOZ | -20 | 20 | µA | VI = GND or 5.5V; VO = 0 to 5.5V; VCC 3.6V; TA = -40°C to +125°C | 4 | |
| Supply Current | ICC | 10 | μA | VI = GND or VCC, IO = 0; VCC 3.6V; TA = -40°C to +85°C | 4 | ||
| Supply Current | ICC | 40 | μA | VI = GND or VCC, IO = 0; VCC 3.6V; TA = -40°C to +125°C | 4 | ||
| Additional Supply Current | ΔICC | 500 | μA | One input at VCC -0.6V; IO = 0A; VCC 2.7V to 3.6V; TA = -40°C to +85°C | 4 | ||
| Additional Supply Current | ΔICC | 5000 | μA | One input at VCC -0.6V; IO = 0A; VCC 2.7V to 3.6V; TA = -40°C to +125°C | 4 | ||
| Thermal Resistance Junction-to-Ambient | θJA | 74 | °C/W | TSSOP-20; 4-layer FR-4 PCB, 2oz copper, minimum recommended pad layout per JESD 51-7 (Note 9) | 6 | ||
| Thermal Resistance Junction-to-Case | θJC | 15 | °C/W | TSSOP-20; 4-layer FR-4 PCB, 2oz copper, minimum recommended pad layout per JESD 51-7 (Note 9) | 6 |
CAD (KiCad official)
- Symbol:
74LVC574AT20-13 - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
74lvc574at20-13-etched.step/74lvc574at20-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lvc574at20-13.step/74lvc574at20-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (11 pp, sha256
4e52b6738de841fd, retrieved 2026-10-21, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).