component

74LVC574AD

Public Made by Adom

by adom

Nexperia Flip Flops, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic ics74lvc574adfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
74lvc574ad / README.md
History Download
Ray Publish 0.1.0 7f156c8 8h ago

74LVC574AD

Nexperia · Flip Flops · SOIC-20-300mil

74LVC574AD from Nexperia, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Output enable input, active LOW; a HIGH puts the outputs in the high-impedance OFF-state without affecting the flip-flop state.
2 D0 input Data input 0, stored on the LOW-to-HIGH clock transition; tolerant to 5.5 V.
3 D1 input Data input 1, stored on the LOW-to-HIGH clock transition; tolerant to 5.5 V.
4 D2 input Data input 2, stored on the LOW-to-HIGH clock transition; tolerant to 5.5 V.
5 D3 input Data input 3, stored on the LOW-to-HIGH clock transition; tolerant to 5.5 V.
6 D4 input Data input 4, stored on the LOW-to-HIGH clock transition; tolerant to 5.5 V.
7 D5 input Data input 5, stored on the LOW-to-HIGH clock transition; tolerant to 5.5 V.
8 D6 input Data input 6, stored on the LOW-to-HIGH clock transition; tolerant to 5.5 V.
9 D7 input Data input 7, stored on the LOW-to-HIGH clock transition; tolerant to 5.5 V.
10 GND power_in Ground (0 V).
11 CP input Clock input, LOW-to-HIGH edge triggered.
12 Q7 tri_state 3-state data output 7, high-impedance when OE is HIGH.
13 Q6 tri_state 3-state data output 6, high-impedance when OE is HIGH.
14 Q5 tri_state 3-state data output 5, high-impedance when OE is HIGH.
15 Q4 tri_state 3-state data output 4, high-impedance when OE is HIGH.
16 Q3 tri_state 3-state data output 3, high-impedance when OE is HIGH.
17 Q2 tri_state 3-state data output 2, high-impedance when OE is HIGH.
18 Q1 tri_state 3-state data output 1, high-impedance when OE is HIGH.
19 Q0 tri_state 3-state data output 0, high-impedance when OE is HIGH.
20 VCC power_in Supply voltage, 1.65 V to 3.6 V recommended (functional down to 1.2 V).

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOIC-20-300mil
Category Logic ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 6.5 V 4
Input clamping current IIK -50 mA VI < 0 4
Input voltage VI -0.5 6.5 V 4
Output clamping current IOK -50 50 mA VO > VCC or VO < 0 4
Output voltage VO -0.5 V output HIGH or LOW state; max printed as VCC + 0.5 4
Output current IO -50 50 mA VO = 0 V to VCC 4
Supply current ICC 100 mA 4
Ground current IGND -100 mA 4
Storage temperature Tstg -65 150 °C 4
Total power dissipation Ptot 500 mW Tamb = -40 °C to +125 °C 4
Supply voltage VCC 1.65 3.6 V 5
Supply voltage (functional) VCC 1.2 V functional 5
Input voltage VI 0 5.5 V 5
Output voltage VO 0 V output HIGH or LOW state; max printed as VCC 5
Output voltage VO 0 5.5 V output 3-state 5
Ambient temperature Tamb -40 125 °C in free air 5
Input transition rise and fall rate Δt/ΔV 0 20 ns/V VCC = 1.65 V to 2.7 V 5
Input transition rise and fall rate Δt/ΔV 0 10 ns/V VCC = 2.7 V to 3.6 V 5
HIGH-level input voltage VIH 1.08 V VCC = 1.2 V; -40 °C to +85 °C 5
HIGH-level input voltage VIH 1.7 V VCC = 2.3 V to 2.7 V; -40 °C to +85 °C 5
HIGH-level input voltage VIH 2 V VCC = 2.7 V to 3.6 V; -40 °C to +85 °C 5
LOW-level input voltage VIL 0.12 V VCC = 1.2 V; -40 °C to +85 °C 5
LOW-level input voltage VIL 0.7 V VCC = 2.3 V to 2.7 V; -40 °C to +85 °C 5
LOW-level input voltage VIL 0.8 V VCC = 2.7 V to 3.6 V; -40 °C to +85 °C 5
HIGH-level output voltage VOH 1.2 V VI = VIH or VIL; IO = -4 mA; VCC = 1.65 V; -40 °C to +85 °C 5
HIGH-level output voltage VOH 1.8 V VI = VIH or VIL; IO = -8 mA; VCC = 2.3 V; -40 °C to +85 °C 5
HIGH-level output voltage VOH 2.2 V VI = VIH or VIL; IO = -12 mA; VCC = 2.7 V; -40 °C to +85 °C 5
HIGH-level output voltage VOH 2.4 V VI = VIH or VIL; IO = -18 mA; VCC = 3.0 V; -40 °C to +85 °C 5
HIGH-level output voltage VOH 2 V VI = VIH or VIL; IO = -24 mA; VCC = 3.0 V; -40 °C to +125 °C 5
LOW-level output voltage VOL 0.2 V VI = VIH or VIL; IO = 100 μA; VCC = 1.65 V to 3.6 V; -40 °C to +85 °C 5
LOW-level output voltage VOL 0.45 V VI = VIH or VIL; IO = 4 mA; VCC = 1.65 V; -40 °C to +85 °C 5
LOW-level output voltage VOL 0.6 V VI = VIH or VIL; IO = 8 mA; VCC = 2.3 V; -40 °C to +85 °C 5
LOW-level output voltage VOL 0.4 V VI = VIH or VIL; IO = 12 mA; VCC = 2.7 V; -40 °C to +85 °C 5
LOW-level output voltage VOL 0.55 V VI = VIH or VIL; IO = 24 mA; VCC = 3.0 V; -40 °C to +85 °C 5
LOW-level output voltage VOL 0.8 V VI = VIH or VIL; IO = 24 mA; VCC = 3.0 V; -40 °C to +125 °C 5
Input leakage current II -5 0.1 5 μA VCC = 3.6 V; VI = 5.5 V or GND; -40 °C to +85 °C; typ printed ±0.1 5
Input leakage current II -20 20 μA VCC = 3.6 V; VI = 5.5 V or GND; -40 °C to +125 °C 5
OFF-state output current IOZ -10 0.1 10 μA VI = VIH or VIL; VCC = 3.6 V; VO = 5.5 V or GND; -40 °C to +85 °C 6
OFF-state output current IOZ -20 20 μA VI = VIH or VIL; VCC = 3.6 V; VO = 5.5 V or GND; -40 °C to +125 °C 6
Power-off leakage supply IOFF -10 0.1 10 μA VCC = 0 V; VI or VO = 5.5 V; -40 °C to +85 °C 6
Power-off leakage supply IOFF -20 20 μA VCC = 0 V; VI or VO = 5.5 V; -40 °C to +125 °C 6
Supply current ICC 0.1 10 μA VCC = 3.6 V; VI = VCC or GND; IO = 0 A; -40 °C to +85 °C 6
Supply current ICC 40 μA VCC = 3.6 V; VI = VCC or GND; IO = 0 A; -40 °C to +125 °C 6
Additional supply current ΔICC 5 500 μA per input pin; VCC = 2.7 V to 3.6 V; VI = VCC - 0.6 V; IO = 0 A; -40 °C to +85 °C 6
Additional supply current ΔICC 5000 μA per input pin; VCC = 2.7 V to 3.6 V; VI = VCC - 0.6 V; IO = 0 A; -40 °C to +125 °C 6
Input capacitance CI 5 pF VCC = 0 V to 3.6 V; VI = GND to VCC 6
Propagation delay CP to Qn tpd 1.5 3.5 7 ns VCC = 3.0 V to 3.6 V; -40 °C to +85 °C 6
Propagation delay CP to Qn tpd 1.5 9 ns VCC = 3.0 V to 3.6 V; -40 °C to +125 °C 6
Enable time OE to Qn ten 1.5 3.2 7.5 ns VCC = 3.0 V to 3.6 V; -40 °C to +85 °C 6
Enable time OE to Qn ten 1.5 9.5 ns VCC = 3.0 V to 3.6 V; -40 °C to +125 °C 6
Disable time OE to Qn tdis 1.5 2.9 6 ns VCC = 3.0 V to 3.6 V; -40 °C to +85 °C 6
Disable time OE to Qn tdis 1.5 7.5 ns VCC = 3.0 V to 3.6 V; -40 °C to +125 °C 6
Pulse width tW 3.3 1.7 ns clock HIGH or LOW; VCC = 3.0 V to 3.6 V; -40 °C to +85 °C 6
Set-up time tsu 2 0.3 ns Dn to CP; VCC = 3.0 V to 3.6 V; -40 °C to +85 °C 7
Hold time th 1.5 -0.2 ns Dn to CP; VCC = 3.0 V to 3.6 V; -40 °C to +85 °C; min printed +1.5 7
Maximum frequency fmax 150 200 MHz VCC = 3.0 V to 3.6 V; -40 °C to +85 °C 7
Maximum frequency fmax 120 MHz VCC = 3.0 V to 3.6 V; -40 °C to +125 °C 7
Output skew time tsk(0) 1 ns VCC = 3.0 V to 3.6 V; -40 °C to +85 °C 7

CAD (KiCad official)

  • Symbol: 74LVC574AD
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: 74lvc574ad-etched.step / 74lvc574ad-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lvc574ad.step / 74lvc574ad.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (16 pp, sha256 784d28d5db487608, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF