main
Ray 74lvc541apw: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) c328a75 28d ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "74lvc541apw",
  "title": "74LVC541APW",
  "brief": "Nexperia Buffer/Driver/Transceiver, TSSOP-20. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "74lvc541apw"
  ],
  "component": {
    "mpn": "74LVC541APW",
    "manufacturer": "Nexperia",
    "package": "TSSOP-20",
    "pin_count": 20,
    "category": "Logic",
    "subcategory": "Buffer/Driver/Transceiver",
    "datasheet": "https://assets.nexperia.com/documents/data-sheet/74LVC541APW.pdf",
    "parts": {
      "symbol": "74lvc541apw.kicad_sym",
      "footprint": "74lvc541apw.kicad_mod",
      "model_3d": "74lvc541apw-etched.glb",
      "model_3d_plain": "74lvc541apw.glb",
      "model_3d_step": "74lvc541apw-etched.step",
      "model_3d_step_plain": "74lvc541apw.step",
      "lbr": "74lvc541apw.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "OE1",
        "type": "input",
        "description": "Output enable input 1 (active LOW). When OE1 is LOW and OE2 is LOW, the Yn outputs follow the An inputs; a HIGH on OE1 forces all Yn outputs to high-impedance 3-state."
      },
      {
        "number": "2",
        "name": "A0",
        "type": "input",
        "description": "Data input bit 0 to buffer channel 0. 5 V tolerant Schmitt-trigger CMOS input; drives output Y0 when the device is enabled."
      },
      {
        "number": "3",
        "name": "A1",
        "type": "input",
        "description": "Data input bit 1 to buffer channel 1. 5 V tolerant Schmitt-trigger CMOS input; drives output Y1 when the device is enabled."
      },
      {
        "number": "4",
        "name": "A2",
        "type": "input",
        "description": "Data input bit 2 to buffer channel 2. 5 V tolerant Schmitt-trigger CMOS input; drives output Y2 when the device is enabled."
      },
      {
        "number": "5",
        "name": "A3",
        "type": "input",
        "description": "Data input bit 3 to buffer channel 3. 5 V tolerant Schmitt-trigger CMOS input; drives output Y3 when the device is enabled."
      },
      {
        "number": "6",
        "name": "A4",
        "type": "input",
        "description": "Data input bit 4 to buffer channel 4. 5 V tolerant Schmitt-trigger CMOS input; drives output Y4 when the device is enabled."
      },
      {
        "number": "7",
        "name": "A5",
        "type": "input",
        "description": "Data input bit 5 to buffer channel 5. 5 V tolerant Schmitt-trigger CMOS input; drives output Y5 when the device is enabled."
      },
      {
        "number": "8",
        "name": "A6",
        "type": "input",
        "description": "Data input bit 6 to buffer channel 6. 5 V tolerant Schmitt-trigger CMOS input; drives output Y6 when the device is enabled."
      },
      {
        "number": "9",
        "name": "A7",
        "type": "input",
        "description": "Data input bit 7 to buffer channel 7. 5 V tolerant Schmitt-trigger CMOS input; drives output Y7 when the device is enabled."
      },
      {
        "number": "10",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V). Common return for supply and logic signals."
      },
      {
        "number": "11",
        "name": "Y7",
        "type": "tri_state",
        "description": "Bus output bit 7 from buffer channel 7. 3-state CMOS output; drives up to ±24 mA at VCC = 3.0 V, high-impedance when OE1 or OE2 is HIGH."
      },
      {
        "number": "12",
        "name": "Y6",
        "type": "tri_state",
        "description": "Bus output bit 6 from buffer channel 6. 3-state CMOS output; drives up to ±24 mA at VCC = 3.0 V, high-impedance when OE1 or OE2 is HIGH."
      },
      {
        "number": "13",
        "name": "Y5",
        "type": "tri_state",
        "description": "Bus output bit 5 from buffer channel 5. 3-state CMOS output; drives up to ±24 mA at VCC = 3.0 V, high-impedance when OE1 or OE2 is HIGH."
      },
      {
        "number": "14",
        "name": "Y4",
        "type": "tri_state",
        "description": "Bus output bit 4 from buffer channel 4. 3-state CMOS output; drives up to ±24 mA at VCC = 3.0 V, high-impedance when OE1 or OE2 is HIGH."
      },
      {
        "number": "15",
        "name": "Y3",
        "type": "tri_state",
        "description": "Bus output bit 3 from buffer channel 3. 3-state CMOS output; drives up to ±24 mA at VCC = 3.0 V, high-impedance when OE1 or OE2 is HIGH."
      },
      {
        "number": "16",
        "name": "Y2",
        "type": "tri_state",
        "description": "Bus output bit 2 from buffer channel 2. 3-state CMOS output; drives up to ±24 mA at VCC = 3.0 V, high-impedance when OE1 or OE2 is HIGH."
      },
      {
        "number": "17",
        "name": "Y1",
        "type": "tri_state",
        "description": "Bus output bit 1 from buffer channel 1. 3-state CMOS output; drives up to ±24 mA at VCC = 3.0 V, high-impedance when OE1 or OE2 is HIGH."
      },
      {
        "number": "18",
        "name": "Y0",
        "type": "tri_state",
        "description": "Bus output bit 0 from buffer channel 0. 3-state CMOS output; drives up to ±24 mA at VCC = 3.0 V, high-impedance when OE1 or OE2 is HIGH."
      },
      {
        "number": "19",
        "name": "OE2",
        "type": "input",
        "description": "Output enable input 2 (active LOW). When OE2 is LOW and OE1 is LOW, the Yn outputs follow the An inputs; a HIGH on OE2 forces all Yn outputs to high-impedance 3-state."
      },
      {
        "number": "20",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply voltage. Recommended range 1.65 V to 3.6 V (functional down to 1.2 V); absolute maximum 6.5 V. Decouple to GND close to the pin."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://assets.nexperia.com/documents/data-sheet/74LVC541APW.pdf",
        "pages": 14,
        "sha256": "33cdbbe38f7bdda9",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "74LVC541",
      "logic_family": "74LVC",
      "function_code": "541",
      "function_class": "Buffer",
      "function_name": "Octal Buffer/Line Driver, 3-State",
      "manufacturer": null,
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "74lvc541apw.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "74lvc541apw-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "dfc3cfc7a2e9c8c2adb35b17071f68721ea35f8e25cb8adaf7b26dd08ddbdf75",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Nexperia",
      "Package": "TSSOP-20",
      "Category": "Logic",
      "Pins": "20"
    }
  },
  "variants": [
    {
      "mpn": "74LVC541APW",
      "kind": "packaging"
    },
    {
      "mpn": "74LVC541APWD",
      "kind": "packaging"
    },
    {
      "mpn": "74LVC541APWBQ",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "74lvc541apw"
  ],
  "discovery_pitch": "74LVC541APW (Nexperia) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "74lvc541apw.kicad_sym",
    "74lvc541apw.kicad_mod",
    "74lvc541apw.glb",
    "74lvc541apw.step",
    "74lvc541apw.lbr",
    "docs/hero.png",
    "docs/74lvc541apw-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T15:16:48.970Z"
}