component
74LVC3G34DP
Public Made by Adomby adom
Nexperia Buffers, Drivers, Receivers, Transceivers, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 5d ago |
| viewers | 5d ago |
| 74lvc3g34dp-etched.glb | 5d ago |
| 74lvc3g34dp-etched.step | 5d ago |
| 74lvc3g34dp-hero.glb | 5d ago |
| 74lvc3g34dp-hero.overlay.json | 5d ago |
| 74lvc3g34dp.glb | 5d ago |
| 74lvc3g34dp.kicad_mod | 5d ago |
| 74lvc3g34dp.kicad_sym | 5d ago |
| 74lvc3g34dp.lbr | 5d ago |
| 74lvc3g34dp.step | 5d ago |
| package.json | 5d ago |
| page.json | 5d ago |
| README.md | 5d ago |
74LVC3G34DP
Nexperia · Buffers, Drivers, Receivers, Transceivers · TSSOP-8
74LVC3G34DP from Nexperia, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input for gate 1; input voltage rated 0 V to 5.5 V, overvoltage tolerant to 5.5 V with Schmitt-trigger action. |
| 2 | 3Y | output | Data output of gate 3; output voltage in active mode is limited to 0 V to VCC. |
| 3 | 2A | input | Data input for gate 2; input voltage rated 0 V to 5.5 V, overvoltage tolerant to 5.5 V with Schmitt-trigger action. |
| 4 | GND | power_in | Ground (0 V) reference for all voltages in the device. |
| 5 | 2Y | output | Data output of gate 2; output voltage in active mode is limited to 0 V to VCC. |
| 6 | 3A | input | Data input for gate 3; input voltage rated 0 V to 5.5 V, overvoltage tolerant to 5.5 V with Schmitt-trigger action. |
| 7 | 1Y | output | Data output of gate 1; output voltage in active mode is limited to 0 V to VCC. |
| 8 | VCC | power_in | Supply voltage; recommended range 1.65 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-8 |
| Category | Logic |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 1.65 | 5.5 | V | 4 | ||
| Input voltage | VI | 0 | 5.5 | V | 4 | ||
| Output voltage (active mode) | VO | 0 | V | Active mode; max printed as VCC | 4 | ||
| Output voltage (power-down mode) | VO | 0 | 5.5 | V | Power-down mode; VCC = 0 V | 4 | |
| Ambient temperature | Tamb | -40 | 125 | °C | 4 | ||
| Input transition rise and fall rate | Δt/ΔV | 20 | ns/V | VCC = 1.65 V to 2.7 V | 4 | ||
| Input transition rise and fall rate | Δt/ΔV | 10 | ns/V | VCC = 2.7 V to 5.5 V | 4 | ||
| Supply voltage | VCC | -0.5 | 6.5 | V | 4 | ||
| Input clamping current | IIK | -50 | mA | VI < 0 V | 4 | ||
| Input voltage | VI | -0.5 | 6.5 | V | Footnote [1]: may be exceeded if input and output current ratings are observed | 4 | |
| Output clamping current | IOK | -50 | 50 | mA | VO > VCC or VO < 0 V | 4 | |
| Output voltage (active mode) | VO | -0.5 | V | Active mode; max printed as VCC + 0.5 | 4 | ||
| Output voltage (power-down mode) | VO | -0.5 | 6.5 | V | Power-down mode; VCC = 0 V | 4 | |
| Output current | IO | -50 | 50 | mA | VO = 0 V to VCC | 4 | |
| Supply current | ICC | 100 | mA | 4 | |||
| Ground current | IGND | -100 | mA | 4 | |||
| Total power dissipation | Ptot | 250 | mW | Tamb = -40 °C to +125 °C | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| HIGH-level input voltage | VIH | 1.7 | V | VCC = 2.3 V to 2.7 V; Tamb = -40 °C to +125 °C | 5 | ||
| HIGH-level input voltage | VIH | 2 | V | VCC = 2.7 V to 3.6 V; Tamb = -40 °C to +125 °C | 5 | ||
| LOW-level input voltage | VIL | 0.7 | V | VCC = 2.3 V to 2.7 V; Tamb = -40 °C to +125 °C | 5 | ||
| LOW-level input voltage | VIL | 0.8 | V | VCC = 2.7 V to 3.6 V; Tamb = -40 °C to +125 °C | 5 | ||
| HIGH-level output voltage | VOH | 0.95 | V | IO = -4 mA; VCC = 1.65 V; Tamb = -40 °C to +125 °C | 5 | ||
| HIGH-level output voltage | VOH | 1.7 | V | IO = -8 mA; VCC = 2.3 V; Tamb = -40 °C to +125 °C | 5 | ||
| HIGH-level output voltage | VOH | 1.9 | V | IO = -12 mA; VCC = 2.7 V; Tamb = -40 °C to +125 °C | 5 | ||
| HIGH-level output voltage | VOH | 2 | V | IO = -24 mA; VCC = 3.0 V; Tamb = -40 °C to +125 °C | 5 | ||
| HIGH-level output voltage | VOH | 3.4 | V | IO = -32 mA; VCC = 4.5 V; Tamb = -40 °C to +125 °C | 5 | ||
| LOW-level output voltage | VOL | 0.1 | V | IO = 100 μA; VCC = 1.65 V to 5.5 V; Tamb = -40 °C to +125 °C | 5 | ||
| LOW-level output voltage | VOL | 0.7 | V | IO = 4 mA; VCC = 1.65 V; Tamb = -40 °C to +125 °C | 5 | ||
| LOW-level output voltage | VOL | 0.45 | V | IO = 8 mA; VCC = 2.3 V; Tamb = -40 °C to +125 °C | 5 | ||
| LOW-level output voltage | VOL | 0.6 | V | IO = 12 mA; VCC = 2.7 V; Tamb = -40 °C to +125 °C | 5 | ||
| LOW-level output voltage | VOL | 0.8 | V | IO = 24 mA; VCC = 3.0 V; Tamb = -40 °C to +125 °C | 5 | ||
| Input leakage current | II | -1 | 0.1 | 1 | μA | VI = 5.5 V or GND; VCC = 0 V to 5.5 V; Tamb = -40 °C to +125 °C | 5 |
| Power-off leakage current | IOFF | -2 | 0.1 | 2 | μA | VCC = 0 V; VI or VO = 5.5 V; Tamb = -40 °C to +125 °C | 5 |
| Supply current | ICC | 0.1 | 4 | μA | VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V; IO = 0 A; Tamb = -40 °C to +125 °C | 5 | |
| Additional supply current per pin | ΔICC | 5 | 500 | μA | Per pin; VCC = 2.3 V to 5.5 V; VI = VCC - 0.6 V; IO = 0 A; Tamb = -40 °C to +125 °C | 5 | |
| Propagation delay nA to nY | tpd | 1 | 3.8 | 10.8 | ns | VCC = 1.65 V to 1.95 V; Tamb = -40 °C to +125 °C; see Fig. 6 | 6 |
| Propagation delay nA to nY | tpd | 0.5 | 2.4 | 5.5 | ns | VCC = 2.3 V to 2.7 V; Tamb = -40 °C to +125 °C; see Fig. 6 | 6 |
| Propagation delay nA to nY | tpd | 0.5 | 2.5 | 6.3 | ns | VCC = 2.7 V; Tamb = -40 °C to +125 °C; see Fig. 6 | 6 |
| Propagation delay nA to nY | tpd | 0.5 | 2.2 | 5.1 | ns | VCC = 3.0 V to 3.6 V; Tamb = -40 °C to +125 °C; see Fig. 6 | 6 |
| Propagation delay nA to nY | tpd | 0.5 | 1.9 | 4 | ns | VCC = 4.5 V to 5.5 V; Tamb = -40 °C to +125 °C; see Fig. 6 | 6 |
CAD (KiCad official)
- Symbol:
74LVC3G34DP - Footprint:
Package_SO:TSSOP-8_3x3mm_P0.65mm - 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
74lvc3g34dp-etched.step/74lvc3g34dp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lvc3g34dp.step/74lvc3g34dp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (16 pp, sha256
1115f375ef1fa1af, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).