component
74LVC2G32DC
Public Made by Adomby adom
Nexperia Logic Gates, VSSOP-8-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdown74LVC2G32DC
Nexperia · Logic Gates · VSSOP-8-0.5mm
74LVC2G32DC from Nexperia, in a VSSOP-8-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input of gate 1; input voltage range is 0 V to 5.5 V, with Schmitt-trigger action and overvoltage tolerance to 5.5 V. |
| 2 | 1B | input | Data input of gate 1; input voltage range is 0 V to 5.5 V, with Schmitt-trigger action and overvoltage tolerance to 5.5 V. |
| 3 | 2Y | output | Data output of gate 2; active-mode output swings 0 V to VCC, and it is 5 V tolerant in power-down mode (VCC = 0 V, up to 5.5 V). |
| 4 | GND | power_in | Ground (0 V); all voltage ratings are referenced to this pin. |
| 5 | 2A | input | Data input of gate 2; input voltage range is 0 V to 5.5 V, with Schmitt-trigger action and overvoltage tolerance to 5.5 V. |
| 6 | 2B | input | Data input of gate 2; input voltage range is 0 V to 5.5 V, with Schmitt-trigger action and overvoltage tolerance to 5.5 V. |
| 7 | 1Y | output | Data output of gate 1; active-mode output swings 0 V to VCC, and it is 5 V tolerant in power-down mode (VCC = 0 V, up to 5.5 V). |
| 8 | VCC | power_in | Supply voltage; recommended operating range 1.65 V to 5.5 V (absolute maximum 6.5 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | VSSOP-8-0.5mm |
| Category | Logic |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | 6.5 | V | 4 | ||
| input voltage | VI | -0.5 | 6.5 | V | 4 | ||
| output voltage | VO | -0.5 | V | Active mode | 4 | ||
| output voltage | VO | -0.5 | 6.5 | V | Power-down mode; VCC = 0 V | 4 | |
| input clamping current | IIK | -50 | mA | VI < 0 V | 4 | ||
| output clamping current | IOK | -50 | 50 | mA | VO < 0 V or VO > VCC | 4 | |
| output current | IO | -50 | 50 | mA | VO = 0 V to VCC | 4 | |
| supply current | ICC | 100 | mA | 4 | |||
| ground current | IGND | -100 | mA | 4 | |||
| storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| total power dissipation | Ptot | 250 | mW | Tamb = -40 °C to +125 °C; all packages except SOT1233-2 | 4 | ||
| supply voltage | VCC | 1.65 | 5.5 | V | 5 | ||
| input voltage | VI | 0 | 5.5 | V | 5 | ||
| output voltage | VO | 0 | V | Active mode | 5 | ||
| output voltage | VO | 0 | 5.5 | V | Power-down mode; VCC = 0 V | 5 | |
| ambient temperature | Tamb | -40 | 125 | °C | 5 | ||
| input transition rise and fall rate | Δt/ΔV | 20 | ns/V | VCC = 1.65 V to 2.7 V | 5 | ||
| input transition rise and fall rate | Δt/ΔV | 10 | ns/V | VCC = 2.7 V to 5.5 V | 5 | ||
| HIGH-level output voltage | VOH | 1.2 | 1.53 | V | Tamb = -40 °C to +85 °C; VI = VIH or VIL; IO = -4 mA; VCC = 1.65 V | 5 | |
| HIGH-level output voltage | VOH | 1.9 | 2.13 | V | Tamb = -40 °C to +85 °C; VI = VIH or VIL; IO = -8 mA; VCC = 2.3 V | 5 | |
| HIGH-level output voltage | VOH | 2.2 | 2.5 | V | Tamb = -40 °C to +85 °C; VI = VIH or VIL; IO = -12 mA; VCC = 2.7 V | 5 | |
| HIGH-level output voltage | VOH | 2.3 | 2.6 | V | Tamb = -40 °C to +85 °C; VI = VIH or VIL; IO = -24 mA; VCC = 3.0 V | 5 | |
| HIGH-level output voltage | VOH | 3.8 | 4.1 | V | Tamb = -40 °C to +85 °C; VI = VIH or VIL; IO = -32 mA; VCC = 4.5 V | 5 | |
| LOW-level output voltage | VOL | 0.1 | V | Tamb = -40 °C to +85 °C; VI = VIH or VIL; IO = 100 μA; VCC = 1.65 V to 5.5 V | 5 | ||
| LOW-level output voltage | VOL | 0.08 | 0.45 | V | Tamb = -40 °C to +85 °C; VI = VIH or VIL; IO = 4 mA; VCC = 1.65 V | 5 | |
| LOW-level output voltage | VOL | 0.14 | 0.3 | V | Tamb = -40 °C to +85 °C; VI = VIH or VIL; IO = 8 mA; VCC = 2.3 V | 5 | |
| LOW-level output voltage | VOL | 0.19 | 0.4 | V | Tamb = -40 °C to +85 °C; VI = VIH or VIL; IO = 12 mA; VCC = 2.7 V | 5 | |
| LOW-level output voltage | VOL | 0.37 | 0.55 | V | Tamb = -40 °C to +85 °C; VI = VIH or VIL; IO = 24 mA; VCC = 3.0 V | 5 | |
| LOW-level output voltage | VOL | 0.43 | 0.55 | V | Tamb = -40 °C to +85 °C; VI = VIH or VIL; IO = 32 mA; VCC = 4.5 V | 5 | |
| HIGH-level input voltage | VIH | 1.7 | V | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V | 6 | ||
| HIGH-level input voltage | VIH | 2 | V | Tamb = -40 °C to +125 °C; VCC = 2.7 V to 3.6 V | 6 | ||
| LOW-level input voltage | VIL | 0.7 | V | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V | 6 | ||
| LOW-level input voltage | VIL | 0.8 | V | Tamb = -40 °C to +125 °C; VCC = 2.7 V to 3.6 V | 6 | ||
| HIGH-level output voltage | VOH | 0.95 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -4 mA; VCC = 1.65 V | 6 | ||
| HIGH-level output voltage | VOH | 1.7 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -8 mA; VCC = 2.3 V | 6 | ||
| HIGH-level output voltage | VOH | 1.9 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -12 mA; VCC = 2.7 V | 6 | ||
| HIGH-level output voltage | VOH | 2 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -24 mA; VCC = 3.0 V | 6 | ||
| HIGH-level output voltage | VOH | 3.4 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -32 mA; VCC = 4.5 V | 6 | ||
| LOW-level output voltage | VOL | 0.1 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 100 μA; VCC = 1.65 V to 5.5 V | 6 | ||
| LOW-level output voltage | VOL | 0.7 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 4 mA; VCC = 1.65 V | 6 | ||
| LOW-level output voltage | VOL | 0.45 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 8 mA; VCC = 2.3 V | 6 | ||
| LOW-level output voltage | VOL | 0.6 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 12 mA; VCC = 2.7 V | 6 | ||
| LOW-level output voltage | VOL | 0.8 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 24 mA; VCC = 3.0 V | 6 | ||
| input leakage current | II | -1 | 1 | μA | Tamb = -40 °C to +125 °C; VI = 5.5 V or GND; VCC = 0 V to 5.5 V | 6 | |
| power-off leakage current | IOFF | -2 | 2 | μA | Tamb = -40 °C to +125 °C; VI or VO = 5.5 V; VCC = 0 V | 6 | |
| supply current | ICC | 4 | μA | Tamb = -40 °C to +125 °C; VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V; IO = 0 A | 6 | ||
| additional supply current per pin | ΔICC | 500 | μA | Tamb = -40 °C to +125 °C; VI = VCC - 0.6 V; VCC = 2.3 V to 5.5 V; IO = 0 A | 6 | ||
| propagation delay nA, nB to nY | tpd | 1.3 | 3.9 | 8.8 | ns | Tamb = -40 °C to +85 °C; VCC = 1.65 V to 1.95 V; see Fig. 5 | 7 |
| propagation delay nA, nB to nY | tpd | 0.8 | 2.4 | 4.7 | ns | Tamb = -40 °C to +85 °C; VCC = 2.3 V to 2.7 V; see Fig. 5 | 7 |
| propagation delay nA, nB to nY | tpd | 0.8 | 2.7 | 4.8 | ns | Tamb = -40 °C to +85 °C; VCC = 2.7 V; see Fig. 5 | 7 |
| propagation delay nA, nB to nY | tpd | 0.9 | 2.2 | 4.2 | ns | Tamb = -40 °C to +85 °C; VCC = 3.0 V to 3.6 V; see Fig. 5 | 7 |
| propagation delay nA, nB to nY | tpd | 0.7 | 1.7 | 3.2 | ns | Tamb = -40 °C to +85 °C; VCC = 4.5 V to 5.5 V; see Fig. 5 | 7 |
| propagation delay nA, nB to nY | tpd | 1.3 | 11 | ns | Tamb = -40 °C to +125 °C; VCC = 1.65 V to 1.95 V; see Fig. 5 | 7 | |
| propagation delay nA, nB to nY | tpd | 0.8 | 5.9 | ns | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V; see Fig. 5 | 7 | |
| propagation delay nA, nB to nY | tpd | 0.8 | 6 | ns | Tamb = -40 °C to +125 °C; VCC = 2.7 V; see Fig. 5 | 7 | |
| propagation delay nA, nB to nY | tpd | 0.9 | 5.3 | ns | Tamb = -40 °C to +125 °C; VCC = 3.0 V to 3.6 V; see Fig. 5 | 7 | |
| propagation delay nA, nB to nY | tpd | 0.7 | 4 | ns | Tamb = -40 °C to +125 °C; VCC = 4.5 V to 5.5 V; see Fig. 5 | 7 |
CAD (KiCad official)
- Symbol:
74LVC2G32DC - Footprint:
Package_SO:VSSOP-8_2.3x2mm_P0.5mm - 3D model: VSSOP-8-0.5mm (KiCad packages3D, STEP)
- 3D model files:
74lvc2g32dc-etched.step/74lvc2g32dc-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lvc2g32dc.step/74lvc2g32dc.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (19 pp, sha256
60af05d31e096a7d, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).