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74lvc2g14w6-7

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Diodes Incorporated Inverters, SOT-26. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs 74lvc2g14w6-7: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers 74lvc2g14w6-7: viewers · Ray 2mo ago
74lvc2g14w6-7-etched.fit.json 74lvc2g14w6-7: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
74lvc2g14w6-7-etched.glb 74lvc2g14w6-7: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
74lvc2g14w6-7-etched.step 74lvc2g14w6-7: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
74lvc2g14w6-7.glb Publish 0.1.0 · Ray 2mo ago
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package.json Publish 0.1.0 · Ray 2mo ago
page.json 74lvc2g14w6-7: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 28d ago
README.md 74lvc2g14w6-7: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

74LVC2G14W6-7

Diodes Incorporated · Inverters · SOT-26

74LVC2G14W6-7 from Diodes Incorporated, in a SOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Schmitt trigger data input for gate 1. Accepts input voltages from 0V up to 5.5V (5.5V-tolerant regardless of VCC). Positive-going threshold VT+ and negative-going threshold VT- provide hysteresis (e.g. ~0.4V at VCC=3V).
2 GND power_in Ground reference (0V) for the device. Return path for supply current and reference for logic thresholds.
3 2A input Schmitt trigger data input for gate 2. Accepts input voltages from 0V up to 5.5V (5.5V-tolerant regardless of VCC). Same hysteresis characteristics as 1A.
4 2Y output Push-pull data output for gate 2 (Y = /A, inverted). Drives ±24mA at VCC=3.0V; up to ±32mA at VCC=4.5V.
5 VCC power_in Positive supply voltage. Operating range 1.65V to 5.5V (1.5V minimum for data retention only). Bypass with a local decoupling capacitor to GND.
6 1Y output Push-pull data output for gate 1 (Y = /A, inverted). Drives ±24mA at VCC=3.0V; up to ±32mA at VCC=4.5V.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-26
Category Logic
Pins 6

Ordering variants

  • 74LVC2G14W6-7
  • 74LVC2G14W6-7DW-7
  • 74LVC2G14W6-7FW5-7
  • 74LVC2G14W6-7FW4-7
  • 74LVC2G14W6-7FX4-7
  • 74LVC2G14W6-7FZ4-7

CAD (KiCad official)

  • Symbol: 74LVC2G14W6-7
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-26 (KiCad packages3D, STEP)
  • 3D model files: 74lvc2g14w6-7-etched.step / 74lvc2g14w6-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lvc2g14w6-7.step / 74lvc2g14w6-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (None pp, sha256 ecf51f2b2d9ba0a2, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF