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74LVC2G125DC

Public Made by Adom

by adom

Nexperia Buffers / Drivers, VSSOP-8-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74LVC2G125DC

Nexperia · Buffers / Drivers · VSSOP-8-0.5mm

74LVC2G125DC from Nexperia, in a VSSOP-8-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Active-LOW output enable input for buffer 1; a HIGH level puts 1Y in the high-impedance OFF state, and inputs tolerate up to 5.5 V.
2 1A input Data input for buffer 1, Schmitt-trigger input that tolerates up to 5.5 V.
3 2Y tri_state 3-state data output of buffer 2, high-impedance when 2OE is HIGH, with ±24 mA drive at VCC = 3.0 V.
4 GND power_in Ground (0 V).
5 2A input Data input for buffer 2, Schmitt-trigger input that tolerates up to 5.5 V.
6 1Y tri_state 3-state data output of buffer 1, high-impedance when 1OE is HIGH, with ±24 mA drive at VCC = 3.0 V.
7 2OE input Active-LOW output enable input for buffer 2; a HIGH level puts 2Y in the high-impedance OFF state, and inputs tolerate up to 5.5 V.
8 VCC power_in Supply voltage, recommended range 1.65 V to 5.5 V (absolute maximum 6.5 V).

Key specifications

Parameter Value
Manufacturer Nexperia
Package VSSOP-8-0.5mm
Category Logic ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 6.5 V 4
Input clamping current IIK -50 mA VI < 0 V 4
Input voltage VI -0.5 6.5 V 4
Output clamping current IOK 50 mA VO > VCC or VO < 0 V (±50) 4
Output voltage, disable mode VO -0.5 6.5 V Disable mode 4
Output voltage, power-down mode VO -0.5 6.5 V Power-down mode; VCC = 0 V 4
Output current IO 50 mA VO = 0 V to VCC (±50) 4
Supply current ICC 100 mA 4
Ground current IGND -100 mA 4
Storage temperature Tstg -65 150 °C 4
Total power dissipation Ptot 250 mW Tamb = -40 °C to +125 °C 4
Supply voltage VCC 1.65 5.5 V 5
Input voltage VI 0 5.5 V 5
Output voltage, enable mode VO 0 V VCC = 1.65 V to 5.5 V; Enable mode (max VCC) 5
Output voltage, disable mode VO 0 5.5 V VCC = 1.65 V to 5.5 V; Disable mode 5
Output voltage, power-down mode VO 0 5.5 V VCC = 0 V; Power-down mode 5
Ambient temperature Tamb -40 125 °C 5
Input transition rise and fall rate Δt/ΔV 20 ns/V VCC = 1.65 V to 2.7 V 5
Input transition rise and fall rate Δt/ΔV 10 ns/V VCC = 2.7 V to 5.5 V 5
HIGH-level input voltage VIH 1.7 V VCC = 2.3 V to 2.7 V; -40 °C to +85 °C 6
HIGH-level input voltage VIH 2 V VCC = 2.7 V to 3.6 V; -40 °C to +85 °C 6
LOW-level input voltage VIL 0.7 V VCC = 2.3 V to 2.7 V; -40 °C to +85 °C 6
LOW-level input voltage VIL 0.8 V VCC = 2.7 V to 3.6 V; -40 °C to +85 °C 6
LOW-level output voltage VOL 0.1 V VI = VIH or VIL; IO = 100 μA; VCC = 1.65 V to 5.5 V; -40 °C to +85 °C 6
LOW-level output voltage VOL 0.45 V VI = VIH or VIL; IO = 4 mA; VCC = 1.65 V; -40 °C to +85 °C 6
LOW-level output voltage VOL 0.3 V VI = VIH or VIL; IO = 8 mA; VCC = 2.3 V; -40 °C to +85 °C 6
LOW-level output voltage VOL 0.4 V VI = VIH or VIL; IO = 12 mA; VCC = 2.7 V; -40 °C to +85 °C 6
LOW-level output voltage VOL 0.55 V VI = VIH or VIL; IO = 24 mA; VCC = 3.0 V; -40 °C to +85 °C 6
HIGH-level output voltage VOH 1.2 V VI = VIH or VIL; IO = -4 mA; VCC = 1.65 V; -40 °C to +85 °C 6
HIGH-level output voltage VOH 1.9 V VI = VIH or VIL; IO = -8 mA; VCC = 2.3 V; -40 °C to +85 °C 6
HIGH-level output voltage VOH 2.2 V VI = VIH or VIL; IO = -12 mA; VCC = 2.7 V; -40 °C to +85 °C 6
HIGH-level output voltage VOH 2.3 V VI = VIH or VIL; IO = -24 mA; VCC = 3.0 V; -40 °C to +85 °C 6
HIGH-level output voltage VOH 3.8 V VI = VIH or VIL; IO = -32 mA; VCC = 4.5 V; -40 °C to +85 °C 6
Input leakage current II -1 0.1 1 μA VI = 5.5 V or GND; VCC = 0 V to 5.5 V; -40 °C to +85 °C 6
OFF-state output current IOZ -2 0.1 2 μA VI = VIH or VIL; VO = 5.5 V or GND; VCC = 3.6 V; -40 °C to +85 °C 6
Power-off leakage current IOFF -2 0.1 2 μA VI or VO = 5.5 V; VCC = 0 V; -40 °C to +85 °C 6
Supply current ICC 0.1 4 μA VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V; IO = 0 A; -40 °C to +85 °C 6
Additional supply current ΔICC 5 500 μA per pin; VI = VCC - 0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V; -40 °C to +85 °C 6
Input capacitance CI 2 pF 6
Propagation delay nA to nY tpd 1 3.7 9.1 ns VCC = 1.65 V to 1.95 V; -40 °C to +85 °C 7
Propagation delay nA to nY tpd 0.5 2.5 4.8 ns VCC = 2.3 V to 2.7 V; -40 °C to +85 °C 7
Propagation delay nA to nY tpd 1 2.7 4.8 ns VCC = 2.7 V; -40 °C to +85 °C 7
Propagation delay nA to nY tpd 0.5 2.3 4.3 ns VCC = 3.0 V to 3.6 V; -40 °C to +85 °C 7
Propagation delay nA to nY tpd 0.5 1.9 3.7 ns VCC = 4.5 V to 5.5 V; -40 °C to +85 °C 7
Enable time nOE to nY ten 1.5 4.3 9.9 ns VCC = 1.65 V to 1.95 V; -40 °C to +85 °C 7
Enable time nOE to nY ten 1 2.8 5.6 ns VCC = 2.3 V to 2.7 V; -40 °C to +85 °C 7
Enable time nOE to nY ten 1.5 3.3 5.7 ns VCC = 2.7 V; -40 °C to +85 °C 7
Enable time nOE to nY ten 0.5 2.4 4.7 ns VCC = 3.0 V to 3.6 V; -40 °C to +85 °C 7
Enable time nOE to nY ten 0.5 2 3.8 ns VCC = 4.5 V to 5.5 V; -40 °C to +85 °C 7
Disable time nOE to nY tdis 1 3.5 11.6 ns VCC = 1.65 V to 1.95 V; -40 °C to +85 °C 7
Disable time nOE to nY tdis 0.5 1.8 5.8 ns VCC = 2.3 V to 2.7 V; -40 °C to +85 °C 7
Disable time nOE to nY tdis 1 2.7 4.8 ns VCC = 2.7 V; -40 °C to +85 °C 7
Disable time nOE to nY tdis 1 2.7 4.6 ns VCC = 3.0 V to 3.6 V; -40 °C to +85 °C 7
Disable time nOE to nY tdis 0.5 1.8 3.4 ns VCC = 4.5 V to 5.5 V; -40 °C to +85 °C 7
Power dissipation capacitance, output enabled CPD 18 pF per buffer; VI = GND to VCC; output enabled 7
Power dissipation capacitance, output disabled CPD 5 pF per buffer; VI = GND to VCC; output disabled 7

CAD (KiCad official)

  • Symbol: 74LVC2G125DC
  • Footprint: Package_SO:VSSOP-8_2.3x2mm_P0.5mm
  • 3D model: VSSOP-8-0.5mm (KiCad packages3D, STEP)
  • 3D model files: 74lvc2g125dc-etched.step / 74lvc2g125dc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lvc2g125dc.step / 74lvc2g125dc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (19 pp, sha256 603a492cc4b9ca0d, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF