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74LVC2G08DP-Q100H
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Nexperia Logic Gates, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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74LVC2G08DP-Q100H
Nexperia · Logic Gates · TSSOP-8
74LVC2G08DP-Q100H from Nexperia, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input 1A of gate 1, one of the two inputs of the 2-input AND function (Y = A AND B, per the function table). |
| 2 | 1B | input | Data input 1B of gate 1, one of the two inputs of the 2-input AND function (Y = A AND B, per the function table). |
| 3 | 2Y | output | Data output 2Y of gate 2, which is HIGH only when both 2A and 2B are HIGH (function table). |
| 4 | GND | power_in | Ground (0 V) reference for all voltages in the datasheet. |
| 5 | 2A | input | Data input 2A of gate 2, one of the two inputs of the 2-input AND function (Y = A AND B, per the function table). |
| 6 | 2B | input | Data input 2B of gate 2, one of the two inputs of the 2-input AND function (Y = A AND B, per the function table). |
| 7 | 1Y | output | Data output 1Y of gate 1, which is HIGH only when both 1A and 1B are HIGH (function table). |
| 8 | VCC | power_in | Supply voltage, recommended operating range 1.65 V to 5.5 V (absolute maximum -0.5 V to +6.5 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-8 |
| Category | Logic |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | 6.5 | V | 4 | ||
| input voltage | VI | -0.5 | 6.5 | V | 4 | ||
| output voltage | VO | -0.5 | V | Active mode; upper limit printed as VCC + 0.5 | 4 | ||
| output voltage | VO | -0.5 | 6.5 | V | Power-down mode; VCC = 0 V | 4 | |
| input clamping current | IIK | -50 | mA | VI < 0 V | 4 | ||
| output clamping current | IOK | -50 | 50 | mA | VO < 0 V or VO > VCC | 4 | |
| output current | IO | -50 | 50 | mA | VO = 0 V to VCC | 4 | |
| supply current | ICC | 100 | mA | 4 | |||
| ground current | IGND | -100 | mA | 4 | |||
| storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| total power dissipation | Ptot | 250 | mW | Tamb = -40 °C to +125 °C | 4 | ||
| supply voltage | VCC | 1.65 | 5.5 | V | 4 | ||
| input voltage | VI | 0 | 5.5 | V | 4 | ||
| output voltage | VO | 0 | V | Active mode; upper limit printed as VCC | 4 | ||
| output voltage | VO | 0 | 5.5 | V | Power-down mode; VCC = 0 V | 4 | |
| ambient temperature | Tamb | -40 | 125 | °C | 4 | ||
| input transition rise and fall rate | Δt/ΔV | 20 | ns/V | VCC = 1.65 V to 2.7 V | 4 | ||
| input transition rise and fall rate | Δt/ΔV | 10 | ns/V | VCC = 2.7 V to 5.5 V | 4 | ||
| HIGH-level input voltage | VIH | 1.7 | V | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V | 5 | ||
| HIGH-level input voltage | VIH | 2 | V | Tamb = -40 °C to +125 °C; VCC = 2.7 V to 3.6 V | 5 | ||
| LOW-level input voltage | VIL | 0.7 | V | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V | 5 | ||
| LOW-level input voltage | VIL | 0.8 | V | Tamb = -40 °C to +125 °C; VCC = 2.7 V to 3.6 V | 5 | ||
| HIGH-level output voltage | VOH | 0.95 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -4 mA; VCC = 1.65 V | 6 | ||
| HIGH-level output voltage | VOH | 1.7 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -8 mA; VCC = 2.3 V | 6 | ||
| HIGH-level output voltage | VOH | 1.9 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -12 mA; VCC = 2.7 V | 6 | ||
| HIGH-level output voltage | VOH | 2 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -24 mA; VCC = 3.0 V | 6 | ||
| HIGH-level output voltage | VOH | 3.4 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -32 mA; VCC = 4.5 V | 6 | ||
| LOW-level output voltage | VOL | 0.1 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 100 μA; VCC = 1.65 V to 5.5 V | 6 | ||
| LOW-level output voltage | VOL | 0.7 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 4 mA; VCC = 1.65 V | 6 | ||
| LOW-level output voltage | VOL | 0.45 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 8 mA; VCC = 2.3 V | 6 | ||
| LOW-level output voltage | VOL | 0.6 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 12 mA; VCC = 2.7 V | 6 | ||
| LOW-level output voltage | VOL | 0.8 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 24 mA; VCC = 3.0 V | 6 | ||
| input leakage current | II | -1 | 1 | μA | Tamb = -40 °C to +125 °C; VI = 5.5 V or GND; VCC = 0 V to 5.5 V | 6 | |
| power-off leakage current | IOFF | -2 | 2 | μA | Tamb = -40 °C to +125 °C; VI or VO = 5.5 V; VCC = 0 V | 6 | |
| supply current | ICC | 4 | μA | Tamb = -40 °C to +125 °C; VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V; IO = 0 A | 6 | ||
| additional supply current per pin | ΔICC | 500 | μA | Tamb = -40 °C to +125 °C; VI = VCC - 0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V | 6 | ||
| propagation delay nA, nB to nY | tpd | 1 | 3.2 | 11.3 | ns | Tamb = -40 °C to +125 °C; VCC = 1.65 V to 1.95 V; typ at Tamb 25 °C; see Fig. 4 | 6 |
| propagation delay nA, nB to nY | tpd | 0.5 | 2.2 | 6.4 | ns | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V; typ at Tamb 25 °C; see Fig. 4 | 6 |
| propagation delay nA, nB to nY | tpd | 1 | 2.5 | 6.7 | ns | Tamb = -40 °C to +125 °C; VCC = 2.7 V; typ at Tamb 25 °C; see Fig. 4 | 6 |
| propagation delay nA, nB to nY | tpd | 0.5 | 2.1 | 5.9 | ns | Tamb = -40 °C to +125 °C; VCC = 3.0 V to 3.6 V; typ at Tamb 25 °C; see Fig. 4 | 6 |
| propagation delay nA, nB to nY | tpd | 0.5 | 1.7 | 4.8 | ns | Tamb = -40 °C to +125 °C; VCC = 4.5 V to 5.5 V; typ at Tamb 25 °C; see Fig. 4 | 6 |
CAD (KiCad official)
- Symbol:
74LVC2G08DP-Q100H - Footprint:
Package_SO:TSSOP-8_3x3mm_P0.65mm - 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
74lvc2g08dp-q100h-etched.step/74lvc2g08dp-q100h-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lvc2g08dp-q100h.step/74lvc2g08dp-q100h.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (14 pp, sha256
3211948f1fb701aa, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74LVC2G08DP-Q100H
**Nexperia** · Logic Gates · TSSOP-8
74LVC2G08DP-Q100H from Nexperia, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input 1A of gate 1, one of the two inputs of the 2-input AND function (Y = A AND B, per the function table). |
| 2 | 1B | input | Data input 1B of gate 1, one of the two inputs of the 2-input AND function (Y = A AND B, per the function table). |
| 3 | 2Y | output | Data output 2Y of gate 2, which is HIGH only when both 2A and 2B are HIGH (function table). |
| 4 | GND | power_in | Ground (0 V) reference for all voltages in the datasheet. |
| 5 | 2A | input | Data input 2A of gate 2, one of the two inputs of the 2-input AND function (Y = A AND B, per the function table). |
| 6 | 2B | input | Data input 2B of gate 2, one of the two inputs of the 2-input AND function (Y = A AND B, per the function table). |
| 7 | 1Y | output | Data output 1Y of gate 1, which is HIGH only when both 1A and 1B are HIGH (function table). |
| 8 | VCC | power_in | Supply voltage, recommended operating range 1.65 V to 5.5 V (absolute maximum -0.5 V to +6.5 V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-8 |
| Category | Logic |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | | 6.5 | V | | 4 |
| input voltage | VI | -0.5 | | 6.5 | V | | 4 |
| output voltage | VO | -0.5 | | | V | Active mode; upper limit printed as VCC + 0.5 | 4 |
| output voltage | VO | -0.5 | | 6.5 | V | Power-down mode; VCC = 0 V | 4 |
| input clamping current | IIK | -50 | | | mA | VI < 0 V | 4 |
| output clamping current | IOK | -50 | | 50 | mA | VO < 0 V or VO > VCC | 4 |
| output current | IO | -50 | | 50 | mA | VO = 0 V to VCC | 4 |
| supply current | ICC | | | 100 | mA | | 4 |
| ground current | IGND | -100 | | | mA | | 4 |
| storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| total power dissipation | Ptot | | | 250 | mW | Tamb = -40 °C to +125 °C | 4 |
| supply voltage | VCC | 1.65 | | 5.5 | V | | 4 |
| input voltage | VI | 0 | | 5.5 | V | | 4 |
| output voltage | VO | 0 | | | V | Active mode; upper limit printed as VCC | 4 |
| output voltage | VO | 0 | | 5.5 | V | Power-down mode; VCC = 0 V | 4 |
| ambient temperature | Tamb | -40 | | 125 | °C | | 4 |
| input transition rise and fall rate | Δt/ΔV | | | 20 | ns/V | VCC = 1.65 V to 2.7 V | 4 |
| input transition rise and fall rate | Δt/ΔV | | | 10 | ns/V | VCC = 2.7 V to 5.5 V | 4 |
| HIGH-level input voltage | VIH | 1.7 | | | V | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V | 5 |
| HIGH-level input voltage | VIH | 2 | | | V | Tamb = -40 °C to +125 °C; VCC = 2.7 V to 3.6 V | 5 |
| LOW-level input voltage | VIL | | | 0.7 | V | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V | 5 |
| LOW-level input voltage | VIL | | | 0.8 | V | Tamb = -40 °C to +125 °C; VCC = 2.7 V to 3.6 V | 5 |
| HIGH-level output voltage | VOH | 0.95 | | | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -4 mA; VCC = 1.65 V | 6 |
| HIGH-level output voltage | VOH | 1.7 | | | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -8 mA; VCC = 2.3 V | 6 |
| HIGH-level output voltage | VOH | 1.9 | | | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -12 mA; VCC = 2.7 V | 6 |
| HIGH-level output voltage | VOH | 2 | | | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -24 mA; VCC = 3.0 V | 6 |
| HIGH-level output voltage | VOH | 3.4 | | | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -32 mA; VCC = 4.5 V | 6 |
| LOW-level output voltage | VOL | | | 0.1 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 100 μA; VCC = 1.65 V to 5.5 V | 6 |
| LOW-level output voltage | VOL | | | 0.7 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 4 mA; VCC = 1.65 V | 6 |
| LOW-level output voltage | VOL | | | 0.45 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 8 mA; VCC = 2.3 V | 6 |
| LOW-level output voltage | VOL | | | 0.6 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 12 mA; VCC = 2.7 V | 6 |
| LOW-level output voltage | VOL | | | 0.8 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 24 mA; VCC = 3.0 V | 6 |
| input leakage current | II | -1 | | 1 | μA | Tamb = -40 °C to +125 °C; VI = 5.5 V or GND; VCC = 0 V to 5.5 V | 6 |
| power-off leakage current | IOFF | -2 | | 2 | μA | Tamb = -40 °C to +125 °C; VI or VO = 5.5 V; VCC = 0 V | 6 |
| supply current | ICC | | | 4 | μA | Tamb = -40 °C to +125 °C; VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V; IO = 0 A | 6 |
| additional supply current per pin | ΔICC | | | 500 | μA | Tamb = -40 °C to +125 °C; VI = VCC - 0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V | 6 |
| propagation delay nA, nB to nY | tpd | 1 | 3.2 | 11.3 | ns | Tamb = -40 °C to +125 °C; VCC = 1.65 V to 1.95 V; typ at Tamb 25 °C; see Fig. 4 | 6 |
| propagation delay nA, nB to nY | tpd | 0.5 | 2.2 | 6.4 | ns | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V; typ at Tamb 25 °C; see Fig. 4 | 6 |
| propagation delay nA, nB to nY | tpd | 1 | 2.5 | 6.7 | ns | Tamb = -40 °C to +125 °C; VCC = 2.7 V; typ at Tamb 25 °C; see Fig. 4 | 6 |
| propagation delay nA, nB to nY | tpd | 0.5 | 2.1 | 5.9 | ns | Tamb = -40 °C to +125 °C; VCC = 3.0 V to 3.6 V; typ at Tamb 25 °C; see Fig. 4 | 6 |
| propagation delay nA, nB to nY | tpd | 0.5 | 1.7 | 4.8 | ns | Tamb = -40 °C to +125 °C; VCC = 4.5 V to 5.5 V; typ at Tamb 25 °C; see Fig. 4 | 6 |
## CAD (KiCad official)
- Symbol: `74LVC2G08DP-Q100H`
- Footprint: `Package_SO:TSSOP-8_3x3mm_P0.65mm`
- 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files: `74lvc2g08dp-q100h-etched.step` / `74lvc2g08dp-q100h-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74lvc2g08dp-q100h.step` / `74lvc2g08dp-q100h.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588914651992100864) (14 pp, sha256 `3211948f1fb701aa`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74lvc2g08dp-q100h-datasheet.pdf)