component
74LVC2G02DC-Q100H
Public Made by Adomby adom
Nexperia Logic Gates, VSSOP-8-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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74LVC2G02DC-Q100H
Nexperia · Logic Gates · VSSOP-8-0.5mm
74LVC2G02DC-Q100H from Nexperia, in a VSSOP-8-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input 1A of NOR gate 1; Schmitt-trigger input, overvoltage tolerant to 5.5 V, and the input voltage range is 0 V to 5.5 V. |
| 2 | 1B | input | Data input 1B of NOR gate 1; Schmitt-trigger input, overvoltage tolerant to 5.5 V, and the input voltage range is 0 V to 5.5 V. |
| 3 | 2Y | output | Data output 2Y of NOR gate 2; 5 V tolerant output, and in active mode the output voltage is limited to 0 V to VCC. |
| 4 | GND | power_in | Ground (0 V) reference for all voltages in the device. |
| 5 | 2A | input | Data input 2A of NOR gate 2; Schmitt-trigger input, overvoltage tolerant to 5.5 V, and the input voltage range is 0 V to 5.5 V. |
| 6 | 2B | input | Data input 2B of NOR gate 2; Schmitt-trigger input, overvoltage tolerant to 5.5 V, and the input voltage range is 0 V to 5.5 V. |
| 7 | 1Y | output | Data output 1Y of NOR gate 1; 5 V tolerant output, and in active mode the output voltage is limited to 0 V to VCC. |
| 8 | VCC | power_in | Supply voltage; recommended operating range is 1.65 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | VSSOP-8-0.5mm |
| Category | Logic |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC supply voltage | VCC | -0.5 | 6.5 | V | 3 | ||
| Input voltage | VI | -0.5 | 6.5 | V | 3 | ||
| Output voltage, active mode | VO | -0.5 | V | Active mode | 3 | ||
| Output voltage, power-down mode | VO | -0.5 | 6.5 | V | Power-down mode; VCC = 0 V | 3 | |
| Input clamping current | IIK | -50 | mA | VI < 0 V | 3 | ||
| Output clamping current | IOK | -50 | 50 | mA | VO < 0 V or VO > VCC | 3 | |
| Output current | IO | -50 | 50 | mA | VO = 0 V to VCC | 3 | |
| Supply current | ICC | 100 | mA | 3 | |||
| Ground current | IGND | -100 | mA | 3 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Total power dissipation | Ptot | 250 | mW | Tamb = -40 °C to +125 °C | 3 | ||
| Supply voltage | VCC | 1.65 | 5.5 | V | 3 | ||
| Input voltage | VI | 0 | 5.5 | V | 3 | ||
| Output voltage, active mode | VO | 0 | V | Active mode | 3 | ||
| Output voltage, power-down mode | VO | 0 | 5.5 | V | Power-down mode; VCC = 0 V | 3 | |
| Ambient temperature | Tamb | -40 | 125 | °C | 3 | ||
| Input transition rise and fall rate | Δt/ΔV | 20 | ns/V | VCC = 1.65 V to 2.7 V | 3 | ||
| Input transition rise and fall rate | Δt/ΔV | 10 | ns/V | VCC = 2.7 V to 5.5 V | 3 | ||
| HIGH-level input voltage | VIH | 1.7 | V | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V | 5 | ||
| HIGH-level input voltage | VIH | 2 | V | Tamb = -40 °C to +125 °C; VCC = 2.7 V to 3.6 V | 5 | ||
| LOW-level input voltage | VIL | 0.7 | V | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V | 5 | ||
| LOW-level input voltage | VIL | 0.8 | V | Tamb = -40 °C to +125 °C; VCC = 2.7 V to 3.6 V | 5 | ||
| HIGH-level output voltage | VOH | 0.95 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -4 mA; VCC = 1.65 V | 5 | ||
| HIGH-level output voltage | VOH | 1.7 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -8 mA; VCC = 2.3 V | 5 | ||
| HIGH-level output voltage | VOH | 1.9 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -12 mA; VCC = 2.7 V | 5 | ||
| HIGH-level output voltage | VOH | 2 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -24 mA; VCC = 3.0 V | 5 | ||
| HIGH-level output voltage | VOH | 3.4 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -32 mA; VCC = 4.5 V | 5 | ||
| LOW-level output voltage | VOL | 0.1 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 100 μA; VCC = 1.65 V to 5.5 V | 5 | ||
| LOW-level output voltage | VOL | 0.7 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 4 mA; VCC = 1.65 V | 5 | ||
| LOW-level output voltage | VOL | 0.45 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 8 mA; VCC = 2.3 V | 5 | ||
| LOW-level output voltage | VOL | 0.6 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 12 mA; VCC = 2.7 V | 5 | ||
| LOW-level output voltage | VOL | 0.8 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 24 mA; VCC = 3.0 V | 5 | ||
| Input leakage current | II | -1 | 1 | μA | Tamb = -40 °C to +125 °C; VI = 5.5 V or GND; VCC = 0 V to 5.5 V | 5 | |
| Power-off leakage current | IOFF | -2 | 2 | μA | Tamb = -40 °C to +125 °C; VI or VO = 5.5 V; VCC = 0 V | 5 | |
| Supply current | ICC | 4 | μA | Tamb = -40 °C to +125 °C; VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V; IO = 0 A | 5 | ||
| Additional supply current per pin | ΔICC | 500 | μA | Tamb = -40 °C to +125 °C; VI = VCC - 0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V | 5 | ||
| Propagation delay tpd | tpd | 1.2 | 11.2 | ns | Tamb = -40 °C to +125 °C; nA, nB to nY; VCC = 1.65 V to 1.95 V; see Fig. 4 | 6 | |
| Propagation delay tpd | tpd | 0.8 | 6.8 | ns | Tamb = -40 °C to +125 °C; nA, nB to nY; VCC = 2.3 V to 2.7 V; see Fig. 4 | 6 | |
| Propagation delay tpd | tpd | 0.8 | 7.5 | ns | Tamb = -40 °C to +125 °C; nA, nB to nY; VCC = 2.7 V; see Fig. 4 | 6 | |
| Propagation delay tpd | tpd | 0.6 | 6.2 | ns | Tamb = -40 °C to +125 °C; nA, nB to nY; VCC = 3.0 V to 3.6 V; see Fig. 4 | 6 | |
| Propagation delay tpd | tpd | 0.6 | 5.5 | ns | Tamb = -40 °C to +125 °C; nA, nB to nY; VCC = 4.5 V to 5.5 V; see Fig. 4 | 6 |
CAD (KiCad official)
- Symbol:
74LVC2G02DC-Q100H - Footprint:
Package_SO:VSSOP-8_2.3x2mm_P0.5mm - 3D model: VSSOP-8-0.5mm (KiCad packages3D, STEP)
- 3D model files:
74lvc2g02dc-q100h-etched.step/74lvc2g02dc-q100h-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lvc2g02dc-q100h.step/74lvc2g02dc-q100h.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (12 pp, sha256
e223406c579875fe, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74LVC2G02DC-Q100H
**Nexperia** · Logic Gates · VSSOP-8-0.5mm
74LVC2G02DC-Q100H from Nexperia, in a VSSOP-8-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input 1A of NOR gate 1; Schmitt-trigger input, overvoltage tolerant to 5.5 V, and the input voltage range is 0 V to 5.5 V. |
| 2 | 1B | input | Data input 1B of NOR gate 1; Schmitt-trigger input, overvoltage tolerant to 5.5 V, and the input voltage range is 0 V to 5.5 V. |
| 3 | 2Y | output | Data output 2Y of NOR gate 2; 5 V tolerant output, and in active mode the output voltage is limited to 0 V to VCC. |
| 4 | GND | power_in | Ground (0 V) reference for all voltages in the device. |
| 5 | 2A | input | Data input 2A of NOR gate 2; Schmitt-trigger input, overvoltage tolerant to 5.5 V, and the input voltage range is 0 V to 5.5 V. |
| 6 | 2B | input | Data input 2B of NOR gate 2; Schmitt-trigger input, overvoltage tolerant to 5.5 V, and the input voltage range is 0 V to 5.5 V. |
| 7 | 1Y | output | Data output 1Y of NOR gate 1; 5 V tolerant output, and in active mode the output voltage is limited to 0 V to VCC. |
| 8 | VCC | power_in | Supply voltage; recommended operating range is 1.65 V to 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | VSSOP-8-0.5mm |
| Category | Logic |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC supply voltage | VCC | -0.5 | | 6.5 | V | | 3 |
| Input voltage | VI | -0.5 | | 6.5 | V | | 3 |
| Output voltage, active mode | VO | -0.5 | | | V | Active mode | 3 |
| Output voltage, power-down mode | VO | -0.5 | | 6.5 | V | Power-down mode; VCC = 0 V | 3 |
| Input clamping current | IIK | -50 | | | mA | VI < 0 V | 3 |
| Output clamping current | IOK | -50 | | 50 | mA | VO < 0 V or VO > VCC | 3 |
| Output current | IO | -50 | | 50 | mA | VO = 0 V to VCC | 3 |
| Supply current | ICC | | | 100 | mA | | 3 |
| Ground current | IGND | -100 | | | mA | | 3 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 3 |
| Total power dissipation | Ptot | | | 250 | mW | Tamb = -40 °C to +125 °C | 3 |
| Supply voltage | VCC | 1.65 | | 5.5 | V | | 3 |
| Input voltage | VI | 0 | | 5.5 | V | | 3 |
| Output voltage, active mode | VO | 0 | | | V | Active mode | 3 |
| Output voltage, power-down mode | VO | 0 | | 5.5 | V | Power-down mode; VCC = 0 V | 3 |
| Ambient temperature | Tamb | -40 | | 125 | °C | | 3 |
| Input transition rise and fall rate | Δt/ΔV | | | 20 | ns/V | VCC = 1.65 V to 2.7 V | 3 |
| Input transition rise and fall rate | Δt/ΔV | | | 10 | ns/V | VCC = 2.7 V to 5.5 V | 3 |
| HIGH-level input voltage | VIH | 1.7 | | | V | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V | 5 |
| HIGH-level input voltage | VIH | 2 | | | V | Tamb = -40 °C to +125 °C; VCC = 2.7 V to 3.6 V | 5 |
| LOW-level input voltage | VIL | | | 0.7 | V | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V | 5 |
| LOW-level input voltage | VIL | | | 0.8 | V | Tamb = -40 °C to +125 °C; VCC = 2.7 V to 3.6 V | 5 |
| HIGH-level output voltage | VOH | 0.95 | | | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -4 mA; VCC = 1.65 V | 5 |
| HIGH-level output voltage | VOH | 1.7 | | | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -8 mA; VCC = 2.3 V | 5 |
| HIGH-level output voltage | VOH | 1.9 | | | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -12 mA; VCC = 2.7 V | 5 |
| HIGH-level output voltage | VOH | 2 | | | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -24 mA; VCC = 3.0 V | 5 |
| HIGH-level output voltage | VOH | 3.4 | | | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -32 mA; VCC = 4.5 V | 5 |
| LOW-level output voltage | VOL | | | 0.1 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 100 μA; VCC = 1.65 V to 5.5 V | 5 |
| LOW-level output voltage | VOL | | | 0.7 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 4 mA; VCC = 1.65 V | 5 |
| LOW-level output voltage | VOL | | | 0.45 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 8 mA; VCC = 2.3 V | 5 |
| LOW-level output voltage | VOL | | | 0.6 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 12 mA; VCC = 2.7 V | 5 |
| LOW-level output voltage | VOL | | | 0.8 | V | Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 24 mA; VCC = 3.0 V | 5 |
| Input leakage current | II | -1 | | 1 | μA | Tamb = -40 °C to +125 °C; VI = 5.5 V or GND; VCC = 0 V to 5.5 V | 5 |
| Power-off leakage current | IOFF | -2 | | 2 | μA | Tamb = -40 °C to +125 °C; VI or VO = 5.5 V; VCC = 0 V | 5 |
| Supply current | ICC | | | 4 | μA | Tamb = -40 °C to +125 °C; VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V; IO = 0 A | 5 |
| Additional supply current per pin | ΔICC | | | 500 | μA | Tamb = -40 °C to +125 °C; VI = VCC - 0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V | 5 |
| Propagation delay tpd | tpd | 1.2 | | 11.2 | ns | Tamb = -40 °C to +125 °C; nA, nB to nY; VCC = 1.65 V to 1.95 V; see Fig. 4 | 6 |
| Propagation delay tpd | tpd | 0.8 | | 6.8 | ns | Tamb = -40 °C to +125 °C; nA, nB to nY; VCC = 2.3 V to 2.7 V; see Fig. 4 | 6 |
| Propagation delay tpd | tpd | 0.8 | | 7.5 | ns | Tamb = -40 °C to +125 °C; nA, nB to nY; VCC = 2.7 V; see Fig. 4 | 6 |
| Propagation delay tpd | tpd | 0.6 | | 6.2 | ns | Tamb = -40 °C to +125 °C; nA, nB to nY; VCC = 3.0 V to 3.6 V; see Fig. 4 | 6 |
| Propagation delay tpd | tpd | 0.6 | | 5.5 | ns | Tamb = -40 °C to +125 °C; nA, nB to nY; VCC = 4.5 V to 5.5 V; see Fig. 4 | 6 |
## CAD (KiCad official)
- Symbol: `74LVC2G02DC-Q100H`
- Footprint: `Package_SO:VSSOP-8_2.3x2mm_P0.5mm`
- 3D model: VSSOP-8-0.5mm (KiCad packages3D, STEP)
- 3D model files: `74lvc2g02dc-q100h-etched.step` / `74lvc2g02dc-q100h-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74lvc2g02dc-q100h.step` / `74lvc2g02dc-q100h.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588914717289566208) (12 pp, sha256 `e223406c579875fe`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74lvc2g02dc-q100h-datasheet.pdf)