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74LVC244AD

Nexperia · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil

74LVC244AD from Nexperia, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Output enable input, active low; a HIGH level places outputs 1Y0 to 1Y3 in the high-impedance OFF-state.
2 1A0 input Data input 1A0 of the first 4-bit buffer; Schmitt-trigger input, overvoltage tolerant to 5.5 V.
3 2Y0 tri_state Data output 2Y0 of the second 4-bit buffer; 3-state output, high-impedance when 2OE is HIGH.
4 1A1 input Data input 1A1 of the first 4-bit buffer; Schmitt-trigger input, overvoltage tolerant to 5.5 V.
5 2Y1 tri_state Data output 2Y1 of the second 4-bit buffer; 3-state output, high-impedance when 2OE is HIGH.
6 1A2 input Data input 1A2 of the first 4-bit buffer; Schmitt-trigger input, overvoltage tolerant to 5.5 V.
7 2Y2 tri_state Data output 2Y2 of the second 4-bit buffer; 3-state output, high-impedance when 2OE is HIGH.
8 1A3 input Data input 1A3 of the first 4-bit buffer; Schmitt-trigger input, overvoltage tolerant to 5.5 V.
9 2Y3 tri_state Data output 2Y3 of the second 4-bit buffer; 3-state output, high-impedance when 2OE is HIGH.
10 GND power_in Ground (0 V).
11 2A3 input Data input 2A3 of the second 4-bit buffer; Schmitt-trigger input, overvoltage tolerant to 5.5 V.
12 1Y3 tri_state Data output 1Y3 of the first 4-bit buffer; 3-state output, high-impedance when 1OE is HIGH.
13 2A2 input Data input 2A2 of the second 4-bit buffer; Schmitt-trigger input, overvoltage tolerant to 5.5 V.
14 1Y2 tri_state Data output 1Y2 of the first 4-bit buffer; 3-state output, high-impedance when 1OE is HIGH.
15 2A1 input Data input 2A1 of the second 4-bit buffer; Schmitt-trigger input, overvoltage tolerant to 5.5 V.
16 1Y1 tri_state Data output 1Y1 of the first 4-bit buffer; 3-state output, high-impedance when 1OE is HIGH.
17 2A0 input Data input 2A0 of the second 4-bit buffer; Schmitt-trigger input, overvoltage tolerant to 5.5 V.
18 1Y0 tri_state Data output 1Y0 of the first 4-bit buffer; 3-state output, high-impedance when 1OE is HIGH.
19 2OE input Output enable input, active low; a HIGH level places outputs 2Y0 to 2Y3 in the high-impedance OFF-state.
20 VCC power_in Supply voltage; 1.65 V to 3.6 V recommended, functional down to 1.2 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOIC-20-300mil
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: 74LVC244AD
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: 74lvc244ad-etched.step / 74lvc244ad-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lvc244ad.step / 74lvc244ad.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (16 pp, sha256 4195257c91082e34, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF